Graph-based individual representation for evolutionary synthesis of arithmetic circuits

Naofumi Homma; Takafumi Aoki; Tatsuo Higuchi

doi:10.1109/CEC.2002.1004463

Graph-based individual representation for evolutionary synthesis of arithmetic circuits

Naofumi Homma, Takafumi Aoki, Tatsuo Higuchi

Tohoku University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

This paper presents a graph-based evolutionary optimization technique, called evolutionary graph generation (EGG), to synthesize arithmetic circuits. The potential capability of EGG has been investigated through an experiment of synthesizing fast constant-coefficient multipliers.

Original language	English
Title of host publication	Proceedings of the 2002 Congress on Evolutionary Computation, CEC 2002
Publisher	IEEE Computer Society
Pages	1492-1497
Number of pages	6
ISBN (Print)	0780372824, 9780780372825
DOIs	https://doi.org/10.1109/CEC.2002.1004463
Publication status	Published - 2002
Event	2002 Congress on Evolutionary Computation, CEC 2002 - Honolulu, HI, United States Duration: 2002 May 12 → 2002 May 17

Publication series

Name	Proceedings of the 2002 Congress on Evolutionary Computation, CEC 2002
Volume	2

Conference

Conference	2002 Congress on Evolutionary Computation, CEC 2002
Country/Territory	United States
City	Honolulu, HI
Period	02/5/12 → 02/5/17

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10.1109/CEC.2002.1004463

Cite this

Homma, N., Aoki, T., & Higuchi, T. (2002). Graph-based individual representation for evolutionary synthesis of arithmetic circuits. In Proceedings of the 2002 Congress on Evolutionary Computation, CEC 2002 (pp. 1492-1497). Article 1004463 (Proceedings of the 2002 Congress on Evolutionary Computation, CEC 2002; Vol. 2). IEEE Computer Society. https://doi.org/10.1109/CEC.2002.1004463

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title = "Graph-based individual representation for evolutionary synthesis of arithmetic circuits",

abstract = "This paper presents a graph-based evolutionary optimization technique, called evolutionary graph generation (EGG), to synthesize arithmetic circuits. The potential capability of EGG has been investigated through an experiment of synthesizing fast constant-coefficient multipliers.",

author = "Naofumi Homma and Takafumi Aoki and Tatsuo Higuchi",

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note = "2002 Congress on Evolutionary Computation, CEC 2002 ; Conference date: 12-05-2002 Through 17-05-2002",

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Homma, N , Aoki, T & Higuchi, T 2002, Graph-based individual representation for evolutionary synthesis of arithmetic circuits. in Proceedings of the 2002 Congress on Evolutionary Computation, CEC 2002., 1004463, Proceedings of the 2002 Congress on Evolutionary Computation, CEC 2002, vol. 2, IEEE Computer Society, pp. 1492-1497, 2002 Congress on Evolutionary Computation, CEC 2002, Honolulu, HI, United States, 02/5/12. https://doi.org/10.1109/CEC.2002.1004463

Graph-based individual representation for evolutionary synthesis of arithmetic circuits. / Homma, Naofumi ; Aoki, Takafumi; Higuchi, Tatsuo.
Proceedings of the 2002 Congress on Evolutionary Computation, CEC 2002. IEEE Computer Society, 2002. p. 1492-1497 1004463 (Proceedings of the 2002 Congress on Evolutionary Computation, CEC 2002; Vol. 2).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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Graph-based individual representation for evolutionary synthesis of arithmetic circuits

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