Heterogeneous Integration at Fine Pitch (≤ 10 μm) Using Thermal Compression Bonding

Adeel A. Bajwa; Sivachandra Jangam; Saptadeep Pal; Niteesh Marathe; Tingyu Bai; Takafumi Fukushima; Mark Goorsky; Subramanian S. Iyer

doi:10.1109/ECTC.2017.240

Heterogeneous Integration at Fine Pitch (≤ 10 μm) Using Thermal Compression Bonding

Adeel A. Bajwa, Sivachandra Jangam, Saptadeep Pal, Niteesh Marathe, Tingyu Bai, Takafumi Fukushima, Mark Goorsky, Subramanian S. Iyer

ENG - Mechanical Systems Engineering

University of California at Los Angeles

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

69 Citations (Scopus)

Abstract

The scaling of package and circuit board dimensions is central to heterogeneous system integration. We describe our solderless direct metal-to-metal low pressure ( 20 MPa. The combined reduction of dielet interconnect pitch, dielet-to-dielet spacing and trace pitch will enable a Moore's law for packaging.

Original language	English
Title of host publication	Proceedings - IEEE 67th Electronic Components and Technology Conference, ECTC 2017
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	1276-1284
Number of pages	9
ISBN (Electronic)	9781509043323
DOIs	https://doi.org/10.1109/ECTC.2017.240
Publication status	Published - 2017 Aug 1
Event	67th IEEE Electronic Components and Technology Conference, ECTC 2017 - Lake Buena Vista, United States Duration: 2017 May 30 → 2017 Jun 2

Publication series

Name	Proceedings - Electronic Components and Technology Conference
ISSN (Print)	0569-5503

Conference

Conference	67th IEEE Electronic Components and Technology Conference, ECTC 2017
Country/Territory	United States
City	Lake Buena Vista
Period	17/5/30 → 17/6/2

Keywords

Dielet-to-dielet spacing
Heterogeneous integrations
Interconnect pitch
Siclicon Interconnect Fabric (Si-IF)
Thermal compression bonding (TCB)

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10.1109/ECTC.2017.240

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Bajwa, A. A., Jangam, S., Pal, S., Marathe, N., Bai, T., Fukushima, T., Goorsky, M., & Iyer, S. S. (2017). Heterogeneous Integration at Fine Pitch (≤ 10 μm) Using Thermal Compression Bonding. In Proceedings - IEEE 67th Electronic Components and Technology Conference, ECTC 2017 (pp. 1276-1284). Article 7999845 (Proceedings - Electronic Components and Technology Conference). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ECTC.2017.240

Bajwa, Adeel A. ; Jangam, Sivachandra ; Pal, Saptadeep et al. / Heterogeneous Integration at Fine Pitch (≤ 10 μm) Using Thermal Compression Bonding. Proceedings - IEEE 67th Electronic Components and Technology Conference, ECTC 2017. Institute of Electrical and Electronics Engineers Inc., 2017. pp. 1276-1284 (Proceedings - Electronic Components and Technology Conference).

@inproceedings{8832f34fb27140d6bd2a9c56fcd34650,

title = "Heterogeneous Integration at Fine Pitch (≤ 10 μm) Using Thermal Compression Bonding",

abstract = "The scaling of package and circuit board dimensions is central to heterogeneous system integration. We describe our solderless direct metal-to-metal low pressure ( 20 MPa. The combined reduction of dielet interconnect pitch, dielet-to-dielet spacing and trace pitch will enable a Moore's law for packaging.",

keywords = "Dielet-to-dielet spacing, Heterogeneous integrations, Interconnect pitch, Siclicon Interconnect Fabric (Si-IF), Thermal compression bonding (TCB)",

author = "Bajwa, {Adeel A.} and Sivachandra Jangam and Saptadeep Pal and Niteesh Marathe and Tingyu Bai and Takafumi Fukushima and Mark Goorsky and Iyer, {Subramanian S.}",

note = "Funding Information: VIII. ACKNOWLEDGEMENT The Defense Advanced Research Projects Agency (DARPA) through ONR grant N00014-16-1-263 and the UCLA CHIPS Consortium supported this work. Part of the experimental work was performed in the Integrated Systems Nanofabrication Cleanroom (ISNC) of California NanoSystem Institute (CNSI) in UCLA and the Nanoelectronics Research Facility (NRF). The authors gratefully acknowledge the support of K&S and staff at ISNC and NRF. The views, opinions and/or findings expressed are those of the authors and should not be interpreted as representing the official views or policies of the Department of Defense or the U.S. Government. Publisher Copyright: {\textcopyright} 2017 IEEE.; 67th IEEE Electronic Components and Technology Conference, ECTC 2017 ; Conference date: 30-05-2017 Through 02-06-2017",

year = "2017",

month = aug,

day = "1",

doi = "10.1109/ECTC.2017.240",

language = "English",

series = "Proceedings - Electronic Components and Technology Conference",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "1276--1284",

booktitle = "Proceedings - IEEE 67th Electronic Components and Technology Conference, ECTC 2017",

address = "United States",

}

Bajwa, AA, Jangam, S, Pal, S, Marathe, N, Bai, T, Fukushima, T, Goorsky, M & Iyer, SS 2017, Heterogeneous Integration at Fine Pitch (≤ 10 μm) Using Thermal Compression Bonding. in Proceedings - IEEE 67th Electronic Components and Technology Conference, ECTC 2017., 7999845, Proceedings - Electronic Components and Technology Conference, Institute of Electrical and Electronics Engineers Inc., pp. 1276-1284, 67th IEEE Electronic Components and Technology Conference, ECTC 2017, Lake Buena Vista, United States, 17/5/30. https://doi.org/10.1109/ECTC.2017.240

Heterogeneous Integration at Fine Pitch (≤ 10 μm) Using Thermal Compression Bonding. / Bajwa, Adeel A.; Jangam, Sivachandra; Pal, Saptadeep et al.
Proceedings - IEEE 67th Electronic Components and Technology Conference, ECTC 2017. Institute of Electrical and Electronics Engineers Inc., 2017. p. 1276-1284 7999845 (Proceedings - Electronic Components and Technology Conference).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Heterogeneous Integration at Fine Pitch (≤ 10 μm) Using Thermal Compression Bonding

AU - Bajwa, Adeel A.

AU - Jangam, Sivachandra

AU - Pal, Saptadeep

AU - Marathe, Niteesh

AU - Bai, Tingyu

AU - Fukushima, Takafumi

AU - Goorsky, Mark

AU - Iyer, Subramanian S.

N1 - Funding Information: VIII. ACKNOWLEDGEMENT The Defense Advanced Research Projects Agency (DARPA) through ONR grant N00014-16-1-263 and the UCLA CHIPS Consortium supported this work. Part of the experimental work was performed in the Integrated Systems Nanofabrication Cleanroom (ISNC) of California NanoSystem Institute (CNSI) in UCLA and the Nanoelectronics Research Facility (NRF). The authors gratefully acknowledge the support of K&S and staff at ISNC and NRF. The views, opinions and/or findings expressed are those of the authors and should not be interpreted as representing the official views or policies of the Department of Defense or the U.S. Government. Publisher Copyright: © 2017 IEEE.

PY - 2017/8/1

Y1 - 2017/8/1

N2 - The scaling of package and circuit board dimensions is central to heterogeneous system integration. We describe our solderless direct metal-to-metal low pressure ( 20 MPa. The combined reduction of dielet interconnect pitch, dielet-to-dielet spacing and trace pitch will enable a Moore's law for packaging.

AB - The scaling of package and circuit board dimensions is central to heterogeneous system integration. We describe our solderless direct metal-to-metal low pressure ( 20 MPa. The combined reduction of dielet interconnect pitch, dielet-to-dielet spacing and trace pitch will enable a Moore's law for packaging.

KW - Dielet-to-dielet spacing

KW - Heterogeneous integrations

KW - Interconnect pitch

KW - Siclicon Interconnect Fabric (Si-IF)

KW - Thermal compression bonding (TCB)

UR - http://www.scopus.com/inward/record.url?scp=85028047159&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85028047159&partnerID=8YFLogxK

U2 - 10.1109/ECTC.2017.240

DO - 10.1109/ECTC.2017.240

M3 - Conference contribution

AN - SCOPUS:85028047159

T3 - Proceedings - Electronic Components and Technology Conference

SP - 1276

EP - 1284

BT - Proceedings - IEEE 67th Electronic Components and Technology Conference, ECTC 2017

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 67th IEEE Electronic Components and Technology Conference, ECTC 2017

Y2 - 30 May 2017 through 2 June 2017

ER -

Bajwa AA, Jangam S, Pal S, Marathe N, Bai T, Fukushima T et al. Heterogeneous Integration at Fine Pitch (≤ 10 μm) Using Thermal Compression Bonding. In Proceedings - IEEE 67th Electronic Components and Technology Conference, ECTC 2017. Institute of Electrical and Electronics Engineers Inc. 2017. p. 1276-1284. 7999845. (Proceedings - Electronic Components and Technology Conference). doi: 10.1109/ECTC.2017.240

Heterogeneous Integration at Fine Pitch (≤ 10 μm) Using Thermal Compression Bonding

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