High signal swing pass-transistor logic using Surrounding Gate Transistor

Tetuo Endoh; Toshihiko Funaki; Hiroshi Sakuraba; Fujio Masuoka

High signal swing pass-transistor logic using Surrounding Gate Transistor

Tetuo Endoh, Toshihiko Funaki, Hiroshi Sakuraba, Fujio Masuoka

ENG - Electrical Engineering

Tohoku University

Research output: Contribution to conference › Paper › peer-review

1 Citation (Scopus)

Abstract

In this paper a pass-transistor logic (PTL) using Surrounding Gate Transistor (SGT) is reported for the first time. This SGT-based PTL brings out the latent abilities of the PTL, especially improvement of the area occupation by 74% and the power-delay product by 70% at the supply voltage of IV compared to bulk MOSFET-based PTL.

Original language	English
Pages	273-275
Number of pages	3
Publication status	Published - 2000
Event	International Conference on Simulation of Semiconductor Processes and Devices - Seattle, WA, USA Duration: 2000 Sept 6 → 2000 Sept 8

Conference

Conference	International Conference on Simulation of Semiconductor Processes and Devices
City	Seattle, WA, USA
Period	00/9/6 → 00/9/8

Cite this

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title = "High signal swing pass-transistor logic using Surrounding Gate Transistor",

abstract = "In this paper a pass-transistor logic (PTL) using Surrounding Gate Transistor (SGT) is reported for the first time. This SGT-based PTL brings out the latent abilities of the PTL, especially improvement of the area occupation by 74% and the power-delay product by 70% at the supply voltage of IV compared to bulk MOSFET-based PTL.",

author = "Tetuo Endoh and Toshihiko Funaki and Hiroshi Sakuraba and Fujio Masuoka",

year = "2000",

language = "English",

pages = "273--275",

note = "International Conference on Simulation of Semiconductor Processes and Devices ; Conference date: 06-09-2000 Through 08-09-2000",

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TY - CONF

T1 - High signal swing pass-transistor logic using Surrounding Gate Transistor

AU - Endoh, Tetuo

AU - Funaki, Toshihiko

AU - Sakuraba, Hiroshi

AU - Masuoka, Fujio

PY - 2000

Y1 - 2000

N2 - In this paper a pass-transistor logic (PTL) using Surrounding Gate Transistor (SGT) is reported for the first time. This SGT-based PTL brings out the latent abilities of the PTL, especially improvement of the area occupation by 74% and the power-delay product by 70% at the supply voltage of IV compared to bulk MOSFET-based PTL.

AB - In this paper a pass-transistor logic (PTL) using Surrounding Gate Transistor (SGT) is reported for the first time. This SGT-based PTL brings out the latent abilities of the PTL, especially improvement of the area occupation by 74% and the power-delay product by 70% at the supply voltage of IV compared to bulk MOSFET-based PTL.

UR - http://www.scopus.com/inward/record.url?scp=0033696685&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0033696685&partnerID=8YFLogxK

M3 - Paper

AN - SCOPUS:0033696685

SP - 273

EP - 275

T2 - International Conference on Simulation of Semiconductor Processes and Devices

Y2 - 6 September 2000 through 8 September 2000

ER -

High signal swing pass-transistor logic using Surrounding Gate Transistor

Abstract

Conference

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