In this paper a pass-transistor logic (PTL) using Surrounding Gate Transistor (SGT) is reported for the first time. This SGT-based PTL brings out the latent abilities of the PTL, especially improvement of the area occupation by 74% and the power-delay product by 70% at the supply voltage of IV compared to bulk MOSFET-based PTL.
|Number of pages||3|
|Publication status||Published - 2000|
|Event||International Conference on Simulation of Semiconductor Processes and Devices - Seattle, WA, USA|
Duration: 2000 Sept 6 → 2000 Sept 8
|Conference||International Conference on Simulation of Semiconductor Processes and Devices|
|City||Seattle, WA, USA|
|Period||00/9/6 → 00/9/8|