Highly reliable SRAM circuit technology using FinFETs

Shin Ichi O'uchi; Kazuhiko Endo; Takashi Matsukawa; Yongxun Liu; Yuki Ishikawa; Junichi Tsukada; Hiromi Yamauchi; Kunihiro Sakamoto; Meishoku Masahara

doi:10.1149/1.3117418

Highly reliable SRAM circuit technology using FinFETs

Shin Ichi O'uchi, Kazuhiko Endo, Takashi Matsukawa, Yongxun Liu, Yuki Ishikawa, Junichi Tsukada, Hiromi Yamauchi, Kunihiro Sakamoto, Meishoku Masahara

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

This paper introduces a flex-pass-gate SRAM (Flex-PG SRAM), which is a FinFET-based SRAM to enhance both the read and write margins independently. The flip-flop in the Flex-PG SRAM consists of usual FinFETs, while the pass gates consist of double-"independent"-gate FinFETs, i.e., "four-terminal"- (4T-) FinFETs. By optimizing the current drivability in the 4T-FinFET pass gates according to operational conditions of read and write, both the read and write margins are enhanced. TCAD simulations revealed that the Flex-PG SRAM increases the read margin by 71 mV without the cell size penalty and decrease in the write margin, even when its 6σ tolerance is ensured. Also, a fabricated device proved its feasibility.

Original language	English
Title of host publication	ECS Transactions - Silicon-on-Insulator Technology and Devices 14 - 215th Meeting of the Electrochemical Society
Publisher	Electrochemical Society Inc.
Pages	273-282
Number of pages	10
Edition	4
ISBN (Electronic)	9781607680628
ISBN (Print)	9781566777124
DOIs	https://doi.org/10.1149/1.3117418
Publication status	Published - 2009
Externally published	Yes
Event	14th International Symposium on Silicon-On-Insulator Technology and Devices - 215th Meeting of the Electrochemical Society - San Francisco, CA, United States Duration: 2009 May 24 → 2009 May 29

Publication series

Name	ECS Transactions
Number	4
Volume	19
ISSN (Print)	1938-5862
ISSN (Electronic)	1938-6737

Other

Other	14th International Symposium on Silicon-On-Insulator Technology and Devices - 215th Meeting of the Electrochemical Society
Country/Territory	United States
City	San Francisco, CA
Period	09/5/24 → 09/5/29

ASJC Scopus subject areas

Engineering(all)

Access to Document

10.1149/1.3117418

Cite this

O'uchi, S. I., Endo, K., Matsukawa, T., Liu, Y., Ishikawa, Y., Tsukada, J., Yamauchi, H., Sakamoto, K., & Masahara, M. (2009). Highly reliable SRAM circuit technology using FinFETs. In ECS Transactions - Silicon-on-Insulator Technology and Devices 14 - 215th Meeting of the Electrochemical Society (4 ed., pp. 273-282). (ECS Transactions; Vol. 19, No. 4). Electrochemical Society Inc.. https://doi.org/10.1149/1.3117418

Highly reliable SRAM circuit technology using FinFETs. / O'uchi, Shin Ichi; Endo, Kazuhiko; Matsukawa, Takashi et al.
ECS Transactions - Silicon-on-Insulator Technology and Devices 14 - 215th Meeting of the Electrochemical Society. 4. ed. Electrochemical Society Inc., 2009. p. 273-282 (ECS Transactions; Vol. 19, No. 4).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

O'uchi, SI, Endo, K, Matsukawa, T, Liu, Y, Ishikawa, Y, Tsukada, J, Yamauchi, H, Sakamoto, K & Masahara, M 2009, Highly reliable SRAM circuit technology using FinFETs. in ECS Transactions - Silicon-on-Insulator Technology and Devices 14 - 215th Meeting of the Electrochemical Society. 4 edn, ECS Transactions, no. 4, vol. 19, Electrochemical Society Inc., pp. 273-282, 14th International Symposium on Silicon-On-Insulator Technology and Devices - 215th Meeting of the Electrochemical Society, San Francisco, CA, United States, 09/5/24. https://doi.org/10.1149/1.3117418

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abstract = "This paper introduces a flex-pass-gate SRAM (Flex-PG SRAM), which is a FinFET-based SRAM to enhance both the read and write margins independently. The flip-flop in the Flex-PG SRAM consists of usual FinFETs, while the pass gates consist of double-{"}independent{"}-gate FinFETs, i.e., {"}four-terminal{"}- (4T-) FinFETs. By optimizing the current drivability in the 4T-FinFET pass gates according to operational conditions of read and write, both the read and write margins are enhanced. TCAD simulations revealed that the Flex-PG SRAM increases the read margin by 71 mV without the cell size penalty and decrease in the write margin, even when its 6σ tolerance is ensured. Also, a fabricated device proved its feasibility.",

author = "O'uchi, {Shin Ichi} and Kazuhiko Endo and Takashi Matsukawa and Yongxun Liu and Yuki Ishikawa and Junichi Tsukada and Hiromi Yamauchi and Kunihiro Sakamoto and Meishoku Masahara",

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AU - O'uchi, Shin Ichi

AU - Endo, Kazuhiko

AU - Matsukawa, Takashi

AU - Liu, Yongxun

AU - Ishikawa, Yuki

AU - Tsukada, Junichi

AU - Yamauchi, Hiromi

AU - Sakamoto, Kunihiro

AU - Masahara, Meishoku

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N2 - This paper introduces a flex-pass-gate SRAM (Flex-PG SRAM), which is a FinFET-based SRAM to enhance both the read and write margins independently. The flip-flop in the Flex-PG SRAM consists of usual FinFETs, while the pass gates consist of double-"independent"-gate FinFETs, i.e., "four-terminal"- (4T-) FinFETs. By optimizing the current drivability in the 4T-FinFET pass gates according to operational conditions of read and write, both the read and write margins are enhanced. TCAD simulations revealed that the Flex-PG SRAM increases the read margin by 71 mV without the cell size penalty and decrease in the write margin, even when its 6σ tolerance is ensured. Also, a fabricated device proved its feasibility.

AB - This paper introduces a flex-pass-gate SRAM (Flex-PG SRAM), which is a FinFET-based SRAM to enhance both the read and write margins independently. The flip-flop in the Flex-PG SRAM consists of usual FinFETs, while the pass gates consist of double-"independent"-gate FinFETs, i.e., "four-terminal"- (4T-) FinFETs. By optimizing the current drivability in the 4T-FinFET pass gates according to operational conditions of read and write, both the read and write margins are enhanced. TCAD simulations revealed that the Flex-PG SRAM increases the read margin by 71 mV without the cell size penalty and decrease in the write margin, even when its 6σ tolerance is ensured. Also, a fabricated device proved its feasibility.

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Highly reliable SRAM circuit technology using FinFETs

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