This paper describes an impact of magnetic-tunnel-junction (MTJ)-device-based nonvolatile circuit techniques and its application to energy-efficient and compact binary-neural-network hardware design. Two specific properties of the MTJ-based nonvolatile-circuit style serve as key technologies to improve energy efficiency and ensure operational reliability. The former is a nonvolatile memory function that can reduce memory-access cost by holding intermediate data close to the logic circuit in nonvolatile manner, and the latter is a variable resistance function that enables compensation for accuracy degradation due to process variation after chip fabrication. As a typical example, a circuit structure performing multiply-accumulate operation and activation function is considered. Performance evaluation based on circuit simulation shows that the circuit designed with a 40 nm MOS/MTJ-hybrid process technology can reduce energy-delay product and circuit area by 99% and 52%, respectively, compared to the conventional logic-memory-separated circuit configurations.