Impact of two-step-recessed gate structure on RF performance of InP-based HEMTs

T. Suemitsu; T. Enoki; H. Yokoyama; Y. Umeda; Y. Ishii

doi:10.1049/el:19980166

Impact of two-step-recessed gate structure on RF performance of InP-based HEMTs

T. Suemitsu, T. Enoki, H. Yokoyama, Y. Umeda, Y. Ishii

New Industry Creation Hatchery Center (NICHe)

Nippon Telegraph & Telephone

Research output: Contribution to journal › Article › peer-review

14 Citations (Scopus)

Abstract

The RF performance of InP-based lattice-matched high electron mobility transistors (HEMTs) is improved by using a two-step-recess process. 0.07 μm gate HEMTs show a cutoff frequency (f_T) of 300GHz, a value previously achievable only with a gate length of 0.05μm in the conventional gate structure, and a maximum frequency of oscillation f_max of 400GHz. The high f_T indicates that the effective gate length is successfully suppressed by the two-step-recessed gate structure. Moreover, owing to the selective etching property, this gate recess process provides high uniformity of the threshold voltage and the cutoff frequency of the HEMTs on a 3in wafer.

Original language	English
Pages (from-to)	220-222
Number of pages	3
Journal	Electronics Letters
Volume	34
Issue number	2
DOIs	https://doi.org/10.1049/el:19980166
Publication status	Published - 1998 Jan 22

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abstract = "The RF performance of InP-based lattice-matched high electron mobility transistors (HEMTs) is improved by using a two-step-recess process. 0.07 μm gate HEMTs show a cutoff frequency (fT) of 300GHz, a value previously achievable only with a gate length of 0.05μm in the conventional gate structure, and a maximum frequency of oscillation fmax of 400GHz. The high fT indicates that the effective gate length is successfully suppressed by the two-step-recessed gate structure. Moreover, owing to the selective etching property, this gate recess process provides high uniformity of the threshold voltage and the cutoff frequency of the HEMTs on a 3in wafer.",

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T1 - Impact of two-step-recessed gate structure on RF performance of InP-based HEMTs

AU - Suemitsu, T.

AU - Enoki, T.

AU - Yokoyama, H.

AU - Umeda, Y.

AU - Ishii, Y.

PY - 1998/1/22

Y1 - 1998/1/22

N2 - The RF performance of InP-based lattice-matched high electron mobility transistors (HEMTs) is improved by using a two-step-recess process. 0.07 μm gate HEMTs show a cutoff frequency (fT) of 300GHz, a value previously achievable only with a gate length of 0.05μm in the conventional gate structure, and a maximum frequency of oscillation fmax of 400GHz. The high fT indicates that the effective gate length is successfully suppressed by the two-step-recessed gate structure. Moreover, owing to the selective etching property, this gate recess process provides high uniformity of the threshold voltage and the cutoff frequency of the HEMTs on a 3in wafer.

AB - The RF performance of InP-based lattice-matched high electron mobility transistors (HEMTs) is improved by using a two-step-recess process. 0.07 μm gate HEMTs show a cutoff frequency (fT) of 300GHz, a value previously achievable only with a gate length of 0.05μm in the conventional gate structure, and a maximum frequency of oscillation fmax of 400GHz. The high fT indicates that the effective gate length is successfully suppressed by the two-step-recessed gate structure. Moreover, owing to the selective etching property, this gate recess process provides high uniformity of the threshold voltage and the cutoff frequency of the HEMTs on a 3in wafer.

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Impact of two-step-recessed gate structure on RF performance of InP-based HEMTs

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