Improved recessed-gate structure for sub-0.1-μm-gate InP-based high electron mobility transistors

Tetsuya Suemitsu, Takatomo Enoki, Haruki Yokoyama, Yasunobu Ishii

Research output: Contribution to journalArticlepeer-review

59 Citations (Scopus)

Abstract

An improved recessed-gate structure for high-performance short-gate InP-based InAlAs/InGaAs high electron mobility transistors (HEMTs) is presented. The effective gate length of the HEMTs is found to be related to the electron density in the side-etched region between the gate and the ohmic capped region. The higher electron density in the side-etched region is efficiently suppresses the effective gate length. A new gate recess process, which consists of a sequence of wet-chemical etching and Ar-plasma etching, enables us to reduce the effective gate length. The new recessed-gate structure successfully provides improved performance with high uniformity. A cutoff frequency of 300GHz is achieved even with 0.07-μm-gate HEMTs.

Original languageEnglish
Pages (from-to)1365-1372
Number of pages8
JournalJapanese Journal of Applied Physics
Volume37
Issue number3 SUPPL. B
DOIs
Publication statusPublished - 1998 Mar

Keywords

  • Cutoff frequency
  • Gate length
  • HEMT
  • InAIAs
  • InGaAs
  • InP
  • Selective etching

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