Improvement in the electrical properties of GaAs/InAs/GaAs structures through the use of (111)A substrates

Hiroshi Yamaguchi; Yoshiro Hirayama

doi:10.1143/jjap.37.1599

Improvement in the electrical properties of GaAs/InAs/GaAs structures through the use of (111)A substrates

Hiroshi Yamaguchi, Yoshiro Hirayama

Center for Science and Innovation in Spintronics (CSIS)

Nippon Telegraph & Telephone

Research output: Contribution to journal › Article › peer-review

24 Citations (Scopus)

Abstract

We compare the electrical properties of InAs thin films embedded in GaAs layers grown by solid source molecular beam epitaxy on (111)A and (001) substrates. A major improvement in Hall mobility through the use of (111)A substrates is confirmed. The carrier concentration is found to saturate at a value of 3 × 10¹² cm^-2 after 50 nm as a function of the InAs thickness. Self-consistent calculation assuming interface Fermi level pinning produces results which are in good agreement with the experimental results, and the pinning position is estimated to be about 0.15eV above the bottom of the conduction band. The origin of Fermi level pinning seems to be the misfit dislocations confined at the InAs/GaAs interfaces based on structural characterization by transmission electron microscopy.

Original language	English
Pages (from-to)	1599-1602
Number of pages	4
Journal	Japanese Journal of Applied Physics
Volume	37
Issue number	3 SUPPL. B
DOIs	https://doi.org/10.1143/jjap.37.1599
Publication status	Published - 1998 Mar

Keywords

(111)A
Dislocations
Fermi level pinning
GaAs
InAs
Quantum well
Two-dimensional electron systems

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10.1143/jjap.37.1599

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title = "Improvement in the electrical properties of GaAs/InAs/GaAs structures through the use of (111)A substrates",

abstract = "We compare the electrical properties of InAs thin films embedded in GaAs layers grown by solid source molecular beam epitaxy on (111)A and (001) substrates. A major improvement in Hall mobility through the use of (111)A substrates is confirmed. The carrier concentration is found to saturate at a value of 3 × 1012 cm-2 after 50 nm as a function of the InAs thickness. Self-consistent calculation assuming interface Fermi level pinning produces results which are in good agreement with the experimental results, and the pinning position is estimated to be about 0.15eV above the bottom of the conduction band. The origin of Fermi level pinning seems to be the misfit dislocations confined at the InAs/GaAs interfaces based on structural characterization by transmission electron microscopy.",

keywords = "(111)A, Dislocations, Fermi level pinning, GaAs, InAs, Quantum well, Two-dimensional electron systems",

author = "Hiroshi Yamaguchi and Yoshiro Hirayama",

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T1 - Improvement in the electrical properties of GaAs/InAs/GaAs structures through the use of (111)A substrates

AU - Yamaguchi, Hiroshi

AU - Hirayama, Yoshiro

PY - 1998/3

Y1 - 1998/3

N2 - We compare the electrical properties of InAs thin films embedded in GaAs layers grown by solid source molecular beam epitaxy on (111)A and (001) substrates. A major improvement in Hall mobility through the use of (111)A substrates is confirmed. The carrier concentration is found to saturate at a value of 3 × 1012 cm-2 after 50 nm as a function of the InAs thickness. Self-consistent calculation assuming interface Fermi level pinning produces results which are in good agreement with the experimental results, and the pinning position is estimated to be about 0.15eV above the bottom of the conduction band. The origin of Fermi level pinning seems to be the misfit dislocations confined at the InAs/GaAs interfaces based on structural characterization by transmission electron microscopy.

AB - We compare the electrical properties of InAs thin films embedded in GaAs layers grown by solid source molecular beam epitaxy on (111)A and (001) substrates. A major improvement in Hall mobility through the use of (111)A substrates is confirmed. The carrier concentration is found to saturate at a value of 3 × 1012 cm-2 after 50 nm as a function of the InAs thickness. Self-consistent calculation assuming interface Fermi level pinning produces results which are in good agreement with the experimental results, and the pinning position is estimated to be about 0.15eV above the bottom of the conduction band. The origin of Fermi level pinning seems to be the misfit dislocations confined at the InAs/GaAs interfaces based on structural characterization by transmission electron microscopy.

KW - (111)A

KW - Dislocations

KW - Fermi level pinning

KW - GaAs

KW - InAs

KW - Quantum well

KW - Two-dimensional electron systems

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Improvement in the electrical properties of GaAs/InAs/GaAs structures through the use of (111)A substrates

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Keywords

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