TY - GEN
T1 - Improving the integrity of Ti barrier layer in Cu-TSVs through self-formed TiSix for via-last TSV technology
AU - Mariappan, Murugesan
AU - Bea, Jichel
AU - Fukushima, Takafumi
AU - Motoyoshi, Makoto
AU - Tanaka, Tetsu
AU - Koyanagi, Mitsumasa
N1 - Publisher Copyright:
© 2016 IEEE.
PY - 2017/7/5
Y1 - 2017/7/5
N2 - With in the process temperature limit of less than 400 °C for via last technology, a simple method to improve the barrier ability of Ti layer in through Si via (TSV) has been studied. After annealing the TSV structures in vacuum at temperatures up to 400 °C, we did observe a tremendous improvement in leak current characteristics for SiO2 dielectric. It was found that the self-formed TiSix at the interface between Cu and SiO2 during the sputter deposition of Ti barrier layer was converted into an amorphous TiOx and SiOx upon vacuum annealing. This simple vacuum annealing of Cu-TSVs is a promising approach for using Ti as barrier layer in via-last 3D-integration.
AB - With in the process temperature limit of less than 400 °C for via last technology, a simple method to improve the barrier ability of Ti layer in through Si via (TSV) has been studied. After annealing the TSV structures in vacuum at temperatures up to 400 °C, we did observe a tremendous improvement in leak current characteristics for SiO2 dielectric. It was found that the self-formed TiSix at the interface between Cu and SiO2 during the sputter deposition of Ti barrier layer was converted into an amorphous TiOx and SiOx upon vacuum annealing. This simple vacuum annealing of Cu-TSVs is a promising approach for using Ti as barrier layer in via-last 3D-integration.
KW - Cu-TSV
KW - Ti Barrier layer
KW - XPS
UR - http://www.scopus.com/inward/record.url?scp=85027123006&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85027123006&partnerID=8YFLogxK
U2 - 10.1109/3DIC.2016.7970017
DO - 10.1109/3DIC.2016.7970017
M3 - Conference contribution
AN - SCOPUS:85027123006
T3 - 2016 IEEE International 3D Systems Integration Conference, 3DIC 2016
BT - 2016 IEEE International 3D Systems Integration Conference, 3DIC 2016
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2016 IEEE International 3D Systems Integration Conference, 3DIC 2016
Y2 - 8 November 2016 through 11 November 2016
ER -