INCREASED DEGRADATION OF HALF-MICRON PMOSFETS DUE TO SWAPPED PULSE STRESSING.

Pulses are applied alternately to the source and drain of p-channel devices, causing hot-electron injection at both ends of the channel. This technique simulates the operation of PMOS pass transistors in real circuit applications, and it is shown that under such conditions device degradation can be significantly faster than under DC stress. Stress results are shown for both conventional p-channel devices, and also devices designed for a half-micrometer CMOS technology with both LDD (lightly doped drain) structures and an additional punchthrough suppressing channel implant. Swapped pulse stressing represents the worst case for submicrometer p-channel transistor degradation. The greatest effect is seen in the transconductance change, which can be bigger than that caused by DC stressing even in the same real time, since hot electrons are injected at both ends of the channel. Lifetimes for half-micrometer devices are shown to be greater than 10 years under worst-case stress conditions for operation at supply voltages up to 4. 5 V.