Influence of fin height on poly-Si/PVD-TiN stacked gate FinFET performance

T. Hayashida, K. Endo, Y. X. Liu, S. O'uchi, T. Matsukawa, W. Mizubayashi, S. Migita, Y. Morita, H. Ota, H. Hashiguchi, D. Kosemura, T. Kamei, J. Tsukada, Y. Ishikawa, H. Yamauchi, A. Ogura, M. Masahara

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

We experimentally investigated the device performance of n +- poly-Si/PVD-TiN stacked gate FinFETs with different H fin's. It was found that mobility enhances in the tall H fin devices due to the increased tensile stress. However, as L g decreases, I on for tall H fin case becomes worse probably due to high R sp. It was also confirmed that V th variation increases with increasing H fin due to the rough etcing of fin sidewall.

Original languageEnglish
Title of host publicationIEEE International SOI Conference, SOI 2011
DOIs
Publication statusPublished - 2011
Event2011 IEEE International SOI Conference, SOI 2011 - Tempe, AZ, United States
Duration: 2011 Oct 32011 Oct 6

Publication series

NameProceedings - IEEE International SOI Conference
ISSN (Print)1078-621X

Conference

Conference2011 IEEE International SOI Conference, SOI 2011
Country/TerritoryUnited States
CityTempe, AZ
Period11/10/311/10/6

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