Izhikevich neuron circuit using stochastic logic

S. Sato; H. Akima; K. Nakajima; M. Sakuraba

doi:10.1049/el.2014.3627

Izhikevich neuron circuit using stochastic logic

S. Sato, H. Akima, K. Nakajima, M. Sakuraba

RIEC - Computing System Platforms Division

Tohoku University

Research output: Contribution to journal › Article › peer-review

2 Citations (Scopus)

Abstract

A digital circuit of the Izhikevich neuron model using stochastic logic is proposed. Stochastic logic is employed in order to save the number of transistors required for multiplication operations. Successful operation of the proposed circuit has been confirmed.

Original language	English
Pages (from-to)	1795-1797
Number of pages	3
Journal	Electronics Letters
Volume	50
Issue number	24
DOIs	https://doi.org/10.1049/el.2014.3627
Publication status	Published - 2014 Nov 1

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title = "Izhikevich neuron circuit using stochastic logic",

abstract = "A digital circuit of the Izhikevich neuron model using stochastic logic is proposed. Stochastic logic is employed in order to save the number of transistors required for multiplication operations. Successful operation of the proposed circuit has been confirmed.",

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AU - Nakajima, K.

AU - Sakuraba, M.

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PY - 2014/11/1

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Izhikevich neuron circuit using stochastic logic

Abstract

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