L-band on-chip matching Si-MMIC low noise amplifier fabricated in SOI CMOS process

M. Ono, N. Suematsu, Y. Yamaguchi, K. Ueda, H. Komurasaki, S. Kubo, Y. Iyama, O. Ishida

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Citation (Scopus)

Abstract

In this paper, on-chip matching Si-MMIC low noise amplifier (LNA) was fabricated in a 0.35 μm SOI CMOS process. This LNA offers 8.7 dB gain, 4.2 dB NF,-2 dBm IIP3 at 2.1 GHz with 3 V, 3 mA DC power. The reduction of the dielectric loss of the spiral inductor is also discussed by referring to the extraction result of the equivalent circuit parameter.

Original languageEnglish
Title of host publication1998 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 1998
EditorsSammy Kayali
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages90-93
Number of pages4
ISBN (Electronic)0780352882, 9780780352889
DOIs
Publication statusPublished - 1998
Event1st Topical Meeting on Silicon Mono1ithic Integrated Circuits in RF Systems, SiRF 1998 - Ann Arbor, United States
Duration: 1998 Sept 181998 Sept 18

Publication series

Name1998 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 1998
Volume1998-September

Conference

Conference1st Topical Meeting on Silicon Mono1ithic Integrated Circuits in RF Systems, SiRF 1998
Country/TerritoryUnited States
CityAnn Arbor
Period98/9/1898/9/18

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