Logic synthesizer with optimizations in two phases

Research output: Chapter in Book/Report/Conference proceeding › Chapter › peer-review

Original language	English
Title of host publication	The VLSI Handbook
Subtitle of host publication	Second Edition
Publisher	CRC Press
Pages	36.1-36.8
ISBN (Electronic)	9781420005967
ISBN (Print)	084934199X, 9781315222004
Publication status	Published - 2016 Apr 19

Cite this

TY - CHAP

T1 - Logic synthesizer with optimizations in two phases

AU - Yoshikawa, Ko

AU - Muroga, Saburo

PY - 2016/4/19

Y1 - 2016/4/19

UR - http://www.scopus.com/inward/record.url?scp=85051452631&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85051452631&partnerID=8YFLogxK

M3 - Chapter

AN - SCOPUS:85051452631

SN - 084934199X

SN - 9781315222004

SP - 36.1-36.8

BT - The VLSI Handbook

PB - CRC Press

ER -