Low Vt Ni-FUSI CMOS technology using a DyO cap layer with either single or dual Ni-phases

H. Y. Yu, S. Z. Chang, A. Veloso, A. Lauwers, C. Adelmann, B. Onsia, S. Van Elshocht, R. Singanamalla, M. Demand, R. Vos, T. Kauerauf, S. Brus, X. Shi, S. Kubicek, C. Vrancken, R. Mitsuhashi, P. Lehnen, J. Kittl, M. Niwa, K. M. YinT. Hoffmann, S. Degendt, M. Jurczak, P. Absil, S. Biesemans

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19 Citations (Scopus)

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