Material stack design with high tolerance to process-induced damage in domain wall motion device

Hiroaki Honjo, Shunsuke Fukami, Kunihiko Ishihara, Keizo Kinoshita, Yukihide Tsuji, Ayuka Morioka, Ryusuke Nebashi, Keiichi Tokutome, Noboru Sakimura, Michio Murahata, Sadahiko Miura, Tadahiko Sugibayashi, Naoki Kasai, Hideo Ohno

Research output: Contribution to journalArticlepeer-review

3 Citations (Scopus)


We have developed a three-terminal domain wall motion (DWM) device. We found that its performance was significantly degraded by ion irradiation to the DWM materials under conventional etching conditions with Ar/NH3/CO gas mixture plasma for the device fabrication. To avoid this process-induced damage (PID), we fabricated and optimized a new material stack, in which a thin Ta layer is inserted on top of the capping layer of the DWM layer We found that the new stack effectively prevented a decrease in DWM layer coercivity, an increase in the critical current, and a decrease in the switching probability owing to the high-etch selectivity of Ta. As a result, the switching property of the DWM cell was greatly improved by the newly developed DWM stacks with high tolerance to PID.

Original languageEnglish
Article number6971768
JournalIEEE Transactions on Magnetics
Issue number11
Publication statusPublished - 2014 Nov 1


  • Domain wall motion (DWM)
  • embedded memory
  • magnetic tunnel junction (MTJ)
  • nonvolatile memory
  • processinduced damage (PID)
  • three-terminal cell.


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