Material stack design with high tolerance to process-induced damage in domain wall motion device

Hiroaki Honjo; Shunsuke Fukami; Kunihiko Ishihara; Keizo Kinoshita; Yukihide Tsuji; Ayuka Morioka; Ryusuke Nebashi; Keiichi Tokutome; Noboru Sakimura; Michio Murahata; Sadahiko Miura; Tadahiko Sugibayashi; Naoki Kasai; Hideo Ohno

doi:10.1109/TMAG.2014.2325019

Material stack design with high tolerance to process-induced damage in domain wall motion device

Hiroaki Honjo, Shunsuke Fukami, Kunihiko Ishihara, Keizo Kinoshita, Yukihide Tsuji, Ayuka Morioka, Ryusuke Nebashi, Keiichi Tokutome, Noboru Sakimura, Michio Murahata, Sadahiko Miura, Tadahiko Sugibayashi, Naoki Kasai, Hideo Ohno

Research output: Contribution to journal › Article › peer-review

3 Citations (Scopus)

Abstract

We have developed a three-terminal domain wall motion (DWM) device. We found that its performance was significantly degraded by ion irradiation to the DWM materials under conventional etching conditions with Ar/NH₃/CO gas mixture plasma for the device fabrication. To avoid this process-induced damage (PID), we fabricated and optimized a new material stack, in which a thin Ta layer is inserted on top of the capping layer of the DWM layer We found that the new stack effectively prevented a decrease in DWM layer coercivity, an increase in the critical current, and a decrease in the switching probability owing to the high-etch selectivity of Ta. As a result, the switching property of the DWM cell was greatly improved by the newly developed DWM stacks with high tolerance to PID.

Original language	English
Article number	6971768
Journal	IEEE Transactions on Magnetics
Volume	50
Issue number	11
DOIs	https://doi.org/10.1109/TMAG.2014.2325019
Publication status	Published - 2014 Nov 1

Keywords

Domain wall motion (DWM)
embedded memory
magnetic tunnel junction (MTJ)
nonvolatile memory
processinduced damage (PID)
three-terminal cell.

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10.1109/TMAG.2014.2325019

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Honjo, H., Fukami, S., Ishihara, K., Kinoshita, K., Tsuji, Y., Morioka, A., Nebashi, R., Tokutome, K., Sakimura, N., Murahata, M., Miura, S., Sugibayashi, T., Kasai, N., & Ohno, H. (2014). Material stack design with high tolerance to process-induced damage in domain wall motion device. IEEE Transactions on Magnetics, 50(11), Article 6971768. https://doi.org/10.1109/TMAG.2014.2325019

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title = "Material stack design with high tolerance to process-induced damage in domain wall motion device",

abstract = "We have developed a three-terminal domain wall motion (DWM) device. We found that its performance was significantly degraded by ion irradiation to the DWM materials under conventional etching conditions with Ar/NH3/CO gas mixture plasma for the device fabrication. To avoid this process-induced damage (PID), we fabricated and optimized a new material stack, in which a thin Ta layer is inserted on top of the capping layer of the DWM layer We found that the new stack effectively prevented a decrease in DWM layer coercivity, an increase in the critical current, and a decrease in the switching probability owing to the high-etch selectivity of Ta. As a result, the switching property of the DWM cell was greatly improved by the newly developed DWM stacks with high tolerance to PID.",

keywords = "Domain wall motion (DWM), embedded memory, magnetic tunnel junction (MTJ), nonvolatile memory, processinduced damage (PID), three-terminal cell.",

author = "Hiroaki Honjo and Shunsuke Fukami and Kunihiko Ishihara and Keizo Kinoshita and Yukihide Tsuji and Ayuka Morioka and Ryusuke Nebashi and Keiichi Tokutome and Noboru Sakimura and Michio Murahata and Sadahiko Miura and Tadahiko Sugibayashi and Naoki Kasai and Hideo Ohno",

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Honjo, H , Fukami, S, Ishihara, K, Kinoshita, K, Tsuji, Y, Morioka, A, Nebashi, R, Tokutome, K, Sakimura, N, Murahata, M, Miura, S, Sugibayashi, T, Kasai, N & Ohno, H 2014, 'Material stack design with high tolerance to process-induced damage in domain wall motion device', IEEE Transactions on Magnetics, vol. 50, no. 11, 6971768. https://doi.org/10.1109/TMAG.2014.2325019

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T1 - Material stack design with high tolerance to process-induced damage in domain wall motion device

AU - Honjo, Hiroaki

AU - Fukami, Shunsuke

AU - Ishihara, Kunihiko

AU - Kinoshita, Keizo

AU - Tsuji, Yukihide

AU - Morioka, Ayuka

AU - Nebashi, Ryusuke

AU - Tokutome, Keiichi

AU - Sakimura, Noboru

AU - Murahata, Michio

AU - Miura, Sadahiko

AU - Sugibayashi, Tadahiko

AU - Kasai, Naoki

AU - Ohno, Hideo

PY - 2014/11/1

Y1 - 2014/11/1

N2 - We have developed a three-terminal domain wall motion (DWM) device. We found that its performance was significantly degraded by ion irradiation to the DWM materials under conventional etching conditions with Ar/NH3/CO gas mixture plasma for the device fabrication. To avoid this process-induced damage (PID), we fabricated and optimized a new material stack, in which a thin Ta layer is inserted on top of the capping layer of the DWM layer We found that the new stack effectively prevented a decrease in DWM layer coercivity, an increase in the critical current, and a decrease in the switching probability owing to the high-etch selectivity of Ta. As a result, the switching property of the DWM cell was greatly improved by the newly developed DWM stacks with high tolerance to PID.

AB - We have developed a three-terminal domain wall motion (DWM) device. We found that its performance was significantly degraded by ion irradiation to the DWM materials under conventional etching conditions with Ar/NH3/CO gas mixture plasma for the device fabrication. To avoid this process-induced damage (PID), we fabricated and optimized a new material stack, in which a thin Ta layer is inserted on top of the capping layer of the DWM layer We found that the new stack effectively prevented a decrease in DWM layer coercivity, an increase in the critical current, and a decrease in the switching probability owing to the high-etch selectivity of Ta. As a result, the switching property of the DWM cell was greatly improved by the newly developed DWM stacks with high tolerance to PID.

KW - Domain wall motion (DWM)

KW - embedded memory

KW - magnetic tunnel junction (MTJ)

KW - nonvolatile memory

KW - processinduced damage (PID)

KW - three-terminal cell.

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JO - IEEE Transactions on Magnetics

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Material stack design with high tolerance to process-induced damage in domain wall motion device

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