Metal inserted poly-si stacks with La2O3 gate dielectrics for scaled EOT and VFB control by oxygen incorporation

T. Kawanago, K. Kakushima, P. Ahmet, K. Tsutsui, A. Nishiyama, N. Sugii, K. Natori, T. Hattori, H. Iwai

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Metal-Inserted Poly-Si (MIPS) stacks for gate oxide scaling have been presented with La2O3 gate dielectrics. An equivalent oxide thickness (EOT) of 0.69nm is achieved with good interfacial property by high temperature annealing. The flatband voltage (VFB) can be modulated by oxygen incorporation in conjunction with Si removal process with less than 1Å EOT degradation.

Original languageEnglish
Title of host publicationChina Semiconductor Technology International Conference 2011, CSTIC 2011
Pages489-494
Number of pages6
Edition1
DOIs
Publication statusPublished - 2011
Externally publishedYes
Event10th China Semiconductor Technology International Conference 2011, CSTIC 2011 - Shanghai, China
Duration: 2011 Mar 132011 Mar 14

Publication series

NameECS Transactions
Number1
Volume34
ISSN (Print)1938-5862
ISSN (Electronic)1938-6737

Other

Other10th China Semiconductor Technology International Conference 2011, CSTIC 2011
Country/TerritoryChina
CityShanghai
Period11/3/1311/3/14

ASJC Scopus subject areas

  • Engineering(all)

Fingerprint

Dive into the research topics of 'Metal inserted poly-si stacks with La2O3 gate dielectrics for scaled EOT and VFB control by oxygen incorporation'. Together they form a unique fingerprint.

Cite this