Modeling and simulation of polycrystalline ZnO thin-film transistors

The simulation and modeling results of polycrystalline ZnO thin-film transistors (TFT) were discussed. The simulation was performed by using a two-dimensional device simulator in order to determine the grain boundary effects on device performance. The density of total trap states, localized in the grain boundaries for polycrystalline ZnO TFT was estimated by determining the apparent mobility and grain size in the device. It was observed that much smaller nanoscaled grains in a polycrystalline ZnO TFT induce a strong overlap of the double Schottky barriers with a higher activation energy in the crystallite and a lower barrier potential in the grain boundary at subthreshold or off-state region of its transfer chracteristics.