Modified Hebbian algorithm for analog VLSI neural network implementation

Various studies on learning rules for neural networks have been done However, most of those do not consider the hardware implementation, which is a great drawback in the LSI implementation of neural networks with learning capability. From such a viewpoint, this paper proposes a self organizing learning rule by modifying the Hebbian learning rule. This rule can be implemented easily on an analog VLSI chip as an on-chip learning rule. The self-organizing ability of the system is verified by simulation experiments. It is shown from the experiment that the learning speed is improved by a factor of 2 to 3, and it is possible to avoid the sudden termination of the learning and the divergence of the synaptic weights.