Novel NAND DRAM with surrounding gate transistor (SGT)-type gain cell

Hiroki Nakamura; Tetsuo Endoh; Hiroshi Sakuraba; Fujio Masuoka

doi:10.1002/ecjb.10198

Novel NAND DRAM with surrounding gate transistor (SGT)-type gain cell

Hiroki Nakamura, Tetsuo Endoh, Hiroshi Sakuraba, Fujio Masuoka

ENG - Electrical Engineering

Tohoku University

Research output: Contribution to journal › Article › peer-review

Abstract

A novel NAND DRAM with SGT-type gain cell is proposed. This SGT-type gain cell structure is composed of an SGT and SGT-type capacitor slacked vertically on a planar read transistor. Its cell size can be reduced to 4F² since it can be arranged to have the cross-point configuration. Therefore, high-density DRAM is achieved. Since it operates as a gain cell, it is possible to obtain sufficient signal charge regardless of the stored amount. Therefore, the proposed DRAM operates at low supply voltages, where it is difficult to obtain sufficient read-out voltage in conventional DRAM. It is shown that the novel NAND DRAM with SGT-type gain cell achieves high-density and low-voltage operation.

Original language	English
Pages (from-to)	1-8
Number of pages	8
Journal	Electronics and Communications in Japan, Part II: Electronics (English translation of Denshi Tsushin Gakkai Ronbunshi)
Volume	87
Issue number	7
DOIs	https://doi.org/10.1002/ecjb.10198
Publication status	Published - 2004 Jul

Keywords

Low-voltage operation
NAND DRAM
SGT-type gain cell
Surrounding gate transistor (SGT)

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10.1002/ecjb.10198

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abstract = "A novel NAND DRAM with SGT-type gain cell is proposed. This SGT-type gain cell structure is composed of an SGT and SGT-type capacitor slacked vertically on a planar read transistor. Its cell size can be reduced to 4F2 since it can be arranged to have the cross-point configuration. Therefore, high-density DRAM is achieved. Since it operates as a gain cell, it is possible to obtain sufficient signal charge regardless of the stored amount. Therefore, the proposed DRAM operates at low supply voltages, where it is difficult to obtain sufficient read-out voltage in conventional DRAM. It is shown that the novel NAND DRAM with SGT-type gain cell achieves high-density and low-voltage operation.",

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AU - Nakamura, Hiroki

AU - Endoh, Tetsuo

AU - Sakuraba, Hiroshi

AU - Masuoka, Fujio

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N2 - A novel NAND DRAM with SGT-type gain cell is proposed. This SGT-type gain cell structure is composed of an SGT and SGT-type capacitor slacked vertically on a planar read transistor. Its cell size can be reduced to 4F2 since it can be arranged to have the cross-point configuration. Therefore, high-density DRAM is achieved. Since it operates as a gain cell, it is possible to obtain sufficient signal charge regardless of the stored amount. Therefore, the proposed DRAM operates at low supply voltages, where it is difficult to obtain sufficient read-out voltage in conventional DRAM. It is shown that the novel NAND DRAM with SGT-type gain cell achieves high-density and low-voltage operation.

AB - A novel NAND DRAM with SGT-type gain cell is proposed. This SGT-type gain cell structure is composed of an SGT and SGT-type capacitor slacked vertically on a planar read transistor. Its cell size can be reduced to 4F2 since it can be arranged to have the cross-point configuration. Therefore, high-density DRAM is achieved. Since it operates as a gain cell, it is possible to obtain sufficient signal charge regardless of the stored amount. Therefore, the proposed DRAM operates at low supply voltages, where it is difficult to obtain sufficient read-out voltage in conventional DRAM. It is shown that the novel NAND DRAM with SGT-type gain cell achieves high-density and low-voltage operation.

KW - Low-voltage operation

KW - NAND DRAM

KW - SGT-type gain cell

KW - Surrounding gate transistor (SGT)

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Novel NAND DRAM with surrounding gate transistor (SGT)-type gain cell

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