On the drain bias dependence of long-channel silicon-on-insulator-based tunnel field-effect transistors

Koichi Fukuda, Takahiro Mori, Hidehiro Asai, Junichi Hattori, Wataru Mizubayashi, Yukinori Morita, Hiroshi Fuketa, Shinji Migita, Hiroyuki Ota, Meishoku Masahara, Kazuhiko Endo, Takashi Matsukawa

Research output: Contribution to journalArticlepeer-review

2 Citations (Scopus)


The drain bias dependence of tunnel field-effect transistors (TFETs) is examined on the basis of the measured characteristics and device simulation to understand the electrical behavior of TFETs. Our analyses focus on the long-channel silicon-on-insulator (SOI)-based TFETs as a good basis for further studies of short-channel effects, scaling issues, and more complicated device structures, such as multigate or nanowire TFETs. By device simulation, it is revealed that the drain bias dependence of the transfer characteristics of the measured TFETs is governed by two physical mechanisms: the density of states (DOS) occupancy factor, which depends on drain-to-source bias voltage, and channel electrostatic potential, which is limited by the drain bias through strong carrier accumulation. These mechanisms differ from the drain-induced barrier lowering (DIBL) of metal-oxide-semiconductor field-effect-transistors (MOSFETs), and cause a significant impact even in long-channel SOIs. Finally, the obtained insights are successfully implemented in a TFET compact model.

Original languageEnglish
Article number04CD04
JournalJapanese Journal of Applied Physics
Issue number4
Publication statusPublished - 2017 Apr


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