TY - GEN
T1 - Operational design and on-board payload data processing of the small satellite "Flying Laptop" with an FPGA-based onboard computing system
AU - Kuwahara, Toshinori
AU - Böhringer, F.
AU - Falke, A.
AU - Eickhoff, J.
AU - Huber, F.
AU - Röser, H. P.
PY - 2008/12/1
Y1 - 2008/12/1
N2 - The small satellite Flying Laptop is the first satellite developed by the Institute of Space Systems at the Universität Stuttgart within the "Stuttgart Small Satellite Program." In this paper the operational design and the on-board payload data processing of the satellite are described. The Flying Laptop is a test bed for an on-board computer with a reconfigurable, redundant and self-controlling high computational ability which is based on a field programmable gate array (FPGA). In addition to this, it has more than ten mission goals including technology demonstration and scientific Earth observation. The designed operational concept enables the achievement of these mission goals, and the developed payload data processing methods expand the scientific usage and enable new possibilities for real-time applications. The operational concept which reflects the aspects of attitude control mode, ground communication, power management, and on-board data handling has been established. The hierarchical architecture of the subsystem and components mode are developed in a state-machine diagram and tested by means of Math Works Simulink-/Stateflow Toolbox. Furthermore, the concept of the on-board payload data processing and its implementation is described and possible applications are discussed.
AB - The small satellite Flying Laptop is the first satellite developed by the Institute of Space Systems at the Universität Stuttgart within the "Stuttgart Small Satellite Program." In this paper the operational design and the on-board payload data processing of the satellite are described. The Flying Laptop is a test bed for an on-board computer with a reconfigurable, redundant and self-controlling high computational ability which is based on a field programmable gate array (FPGA). In addition to this, it has more than ten mission goals including technology demonstration and scientific Earth observation. The designed operational concept enables the achievement of these mission goals, and the developed payload data processing methods expand the scientific usage and enable new possibilities for real-time applications. The operational concept which reflects the aspects of attitude control mode, ground communication, power management, and on-board data handling has been established. The hierarchical architecture of the subsystem and components mode are developed in a state-machine diagram and tested by means of Math Works Simulink-/Stateflow Toolbox. Furthermore, the concept of the on-board payload data processing and its implementation is described and possible applications are discussed.
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M3 - Conference contribution
AN - SCOPUS:77950472366
SN - 9781615671601
T3 - International Astronautical Federation - 59th International Astronautical Congress 2008, IAC 2008
SP - 3880
EP - 3887
BT - International Astronautical Federation - 59th International Astronautical Congress 2008, IAC 2008
T2 - 59th International Astronautical Congress 2008, IAC 2008
Y2 - 29 September 2008 through 3 October 2008
ER -