Optimal design of a dual-rail multiple-valued current-mode integrated circuit based on voltage swing minimization

This paper presents a design of a dual-rail multiple-valued current-mode (MVCM) circuit using two supply voltages and biasing current sources. The switching delays of both a threshold detector (TD) and a current mirror, which are the basic components of the dual-rail MVCM circuit, depend on the gate-to-source voltage swing. The use of two supply voltages and biasing current sources makes the voltage swing small, which results in high-speed switching as well as low power dissipation. As a typical example of the proposed dual-rail MVCM circuit, a radix-2 signed-digit full adder (SDFA) is designed and fabricated using a 0.35-μm CMOS technology. Its performance is superior to the SDFA with a single supply voltage and no biasing current sources.