Optimized oxygen annealing process for Vth tuning of p-MOSFET with High-k/metal gate stacks

T. Kawanago; Y. Lee; K. Kakushima; P. Ahmet; K. Tsutsui; A. Nishiyama; N. Sugii; K. Natori; T. Hattori; H. Iwai

doi:10.1109/ESSDERC.2010.5618352

Optimized oxygen annealing process for V_th tuning of p-MOSFET with High-k/metal gate stacks

T. Kawanago, Y. Lee, K. Kakushima, P. Ahmet, K. Tsutsui, A. Nishiyama, N. Sugii, K. Natori, T. Hattori, H. Iwai

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

5 Citations (Scopus)

Abstract

A demonstration of V_FB/V_th tuning has been conducted by optimized annealing in oxygen ambient for direct contact of high-k with Si gate stacks. The amount of oxygen atoms has been controlled by optimized annealing temperature and the thickness of the gate electrode. The shift in VFB has been confirmed irrespective of gate dielectric materials and the thickness. The V_th of pMOSFET can be controlled to positive direction by 520 mV without any EOT penalty. Once a shift in V_FB/V_th is obtained, the values are found to be stable even after following forming gas annealing.

Original language	English
Title of host publication	2010 Proceedings of the European Solid State Device Research Conference, ESSDERC 2010
Pages	301-304
Number of pages	4
DOIs	https://doi.org/10.1109/ESSDERC.2010.5618352
Publication status	Published - 2010
Externally published	Yes
Event	2010 European Solid State Device Research Conference, ESSDERC 2010 - Sevilla, Spain Duration: 2010 Sept 14 → 2010 Sept 16

Publication series

Name	2010 Proceedings of the European Solid State Device Research Conference, ESSDERC 2010

Other

Other	2010 European Solid State Device Research Conference, ESSDERC 2010
Country/Territory	Spain
City	Sevilla
Period	10/9/14 → 10/9/16

ASJC Scopus subject areas

Condensed Matter Physics

Access to Document

10.1109/ESSDERC.2010.5618352

Cite this

Kawanago, T., Lee, Y., Kakushima, K., Ahmet, P., Tsutsui, K., Nishiyama, A., Sugii, N., Natori, K., Hattori, T., & Iwai, H. (2010). Optimized oxygen annealing process for V_th tuning of p-MOSFET with High-k/metal gate stacks. In 2010 Proceedings of the European Solid State Device Research Conference, ESSDERC 2010 (pp. 301-304). [5618352] (2010 Proceedings of the European Solid State Device Research Conference, ESSDERC 2010). https://doi.org/10.1109/ESSDERC.2010.5618352

Optimized oxygen annealing process for V_th tuning of p-MOSFET with High-k/metal gate stacks. / Kawanago, T.; Lee, Y.; Kakushima, K. et al.

2010 Proceedings of the European Solid State Device Research Conference, ESSDERC 2010. 2010. p. 301-304 5618352 (2010 Proceedings of the European Solid State Device Research Conference, ESSDERC 2010).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Kawanago, T, Lee, Y, Kakushima, K, Ahmet, P, Tsutsui, K, Nishiyama, A, Sugii, N, Natori, K, Hattori, T & Iwai, H 2010, Optimized oxygen annealing process for V_th tuning of p-MOSFET with High-k/metal gate stacks. in 2010 Proceedings of the European Solid State Device Research Conference, ESSDERC 2010., 5618352, 2010 Proceedings of the European Solid State Device Research Conference, ESSDERC 2010, pp. 301-304, 2010 European Solid State Device Research Conference, ESSDERC 2010, Sevilla, Spain, 10/9/14. https://doi.org/10.1109/ESSDERC.2010.5618352

Kawanago T, Lee Y, Kakushima K, Ahmet P, Tsutsui K, Nishiyama A et al. Optimized oxygen annealing process for V_th tuning of p-MOSFET with High-k/metal gate stacks. In 2010 Proceedings of the European Solid State Device Research Conference, ESSDERC 2010. 2010. p. 301-304. 5618352. (2010 Proceedings of the European Solid State Device Research Conference, ESSDERC 2010). doi: 10.1109/ESSDERC.2010.5618352

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abstract = "A demonstration of VFB/Vth tuning has been conducted by optimized annealing in oxygen ambient for direct contact of high-k with Si gate stacks. The amount of oxygen atoms has been controlled by optimized annealing temperature and the thickness of the gate electrode. The shift in VFB has been confirmed irrespective of gate dielectric materials and the thickness. The Vth of pMOSFET can be controlled to positive direction by 520 mV without any EOT penalty. Once a shift in VFB/Vth is obtained, the values are found to be stable even after following forming gas annealing.",

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