TY - GEN
T1 - Performance evaluation of FPGA-based custom accelerators for iterative linear-equation solvers
AU - Sano, Kentaro
AU - Yamamoto, Satoru
AU - Hatsuda, Yoshiaki
PY - 2011
Y1 - 2011
N2 - In this paper, we evaluate the performance of an FPGA(Field-Programmable Gate Array)-based computing system that accelerates iterative linear-equation solvers with a low memory-bandwidth. The pipelining approach is applied to the computing kernels over successive iterations, allowing the accelerator to scale the performance with a constant bandwidth. The prototype implementation with multiple FPGAs demonstrates almost linear speedup and higher performance than software execution on a microprocessor.
AB - In this paper, we evaluate the performance of an FPGA(Field-Programmable Gate Array)-based computing system that accelerates iterative linear-equation solvers with a low memory-bandwidth. The pipelining approach is applied to the computing kernels over successive iterations, allowing the accelerator to scale the performance with a constant bandwidth. The prototype implementation with multiple FPGAs demonstrates almost linear speedup and higher performance than software execution on a microprocessor.
UR - http://www.scopus.com/inward/record.url?scp=84880643714&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84880643714&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:84880643714
SN - 9781624101489
T3 - 20th AIAA Computational Fluid Dynamics Conference 2011
BT - 20th AIAA Computational Fluid Dynamics Conference 2011
T2 - 20th AIAA Computational Fluid Dynamics Conference 2011
Y2 - 27 June 2011 through 30 June 2011
ER -