Pre-distortion linearizer using self base bias control circuit

Shintaro Shinjo; Kazuyuki Totano; Hiroyuki Tokunaga; Kazutomi Mori; Noriharu Suematsu

doi:10.1109/APMC.2006.4429553

Pre-distortion linearizer using self base bias control circuit

Shintaro Shinjo, Kazuyuki Totano, Hiroyuki Tokunaga, Kazutomi Mori, Noriharu Suematsu

RIEC - Information Communication Platforms Division

Mitsubishi Electric Corporation

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

3 Citations (Scopus)

Abstract

The pre-distortion linearizer, which is composed of a RF transistor with a self base bias control circuit, is described. By applying the p-MOSFET current mirror circuit to the self base bias control circuit, the linearizer responds the envelope of the modulated signal. The linearizer realizes both positive and negative gain deviations, and compensates the distortion of any PA's. The GaAs FET power amplifier (PA), which has negative gain deviation, achieves the adjacent channel power leakage ratio (ACLR) improvement of 8.1dB by using the proposed linearizer for QPSK modulated signal with the chip rate of 3.84Mc/s. Also, the LDMOS PA, which has positive gain deviation, achieves the ACLR improvement of 8.3dB.

Original language	English
Title of host publication	2006 Asia-Pacific Microwave Conference Proceedings, APMC
Pages	879-882
Number of pages	4
DOIs	https://doi.org/10.1109/APMC.2006.4429553
Publication status	Published - 2006
Event	2006 Asia-Pacific Microwave Conference, APMC - Yokohama, Japan Duration: 2006 Dec 12 → 2006 Dec 15

Publication series

Name	Asia-Pacific Microwave Conference Proceedings, APMC
Volume	2

Conference

Conference	2006 Asia-Pacific Microwave Conference, APMC
Country/Territory	Japan
City	Yokohama
Period	06/12/12 → 06/12/15

Keywords

Distortion
Linearizer
Power amplifiers
Silicon germanium

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10.1109/APMC.2006.4429553

Cite this

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title = "Pre-distortion linearizer using self base bias control circuit",

abstract = "The pre-distortion linearizer, which is composed of a RF transistor with a self base bias control circuit, is described. By applying the p-MOSFET current mirror circuit to the self base bias control circuit, the linearizer responds the envelope of the modulated signal. The linearizer realizes both positive and negative gain deviations, and compensates the distortion of any PA's. The GaAs FET power amplifier (PA), which has negative gain deviation, achieves the adjacent channel power leakage ratio (ACLR) improvement of 8.1dB by using the proposed linearizer for QPSK modulated signal with the chip rate of 3.84Mc/s. Also, the LDMOS PA, which has positive gain deviation, achieves the ACLR improvement of 8.3dB.",

keywords = "Distortion, Linearizer, Power amplifiers, Silicon germanium",

author = "Shintaro Shinjo and Kazuyuki Totano and Hiroyuki Tokunaga and Kazutomi Mori and Noriharu Suematsu",

year = "2006",

doi = "10.1109/APMC.2006.4429553",

language = "English",

isbn = "4902339099",

series = "Asia-Pacific Microwave Conference Proceedings, APMC",

pages = "879--882",

booktitle = "2006 Asia-Pacific Microwave Conference Proceedings, APMC",

note = "2006 Asia-Pacific Microwave Conference, APMC ; Conference date: 12-12-2006 Through 15-12-2006",

}

Shinjo, S, Totano, K, Tokunaga, H, Mori, K & Suematsu, N 2006, Pre-distortion linearizer using self base bias control circuit. in 2006 Asia-Pacific Microwave Conference Proceedings, APMC., 4429553, Asia-Pacific Microwave Conference Proceedings, APMC, vol. 2, pp. 879-882, 2006 Asia-Pacific Microwave Conference, APMC, Yokohama, Japan, 06/12/12. https://doi.org/10.1109/APMC.2006.4429553

Pre-distortion linearizer using self base bias control circuit. / Shinjo, Shintaro; Totano, Kazuyuki; Tokunaga, Hiroyuki et al.
2006 Asia-Pacific Microwave Conference Proceedings, APMC. 2006. p. 879-882 4429553 (Asia-Pacific Microwave Conference Proceedings, APMC; Vol. 2).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Pre-distortion linearizer using self base bias control circuit

AU - Shinjo, Shintaro

AU - Totano, Kazuyuki

AU - Tokunaga, Hiroyuki

AU - Mori, Kazutomi

AU - Suematsu, Noriharu

PY - 2006

Y1 - 2006

N2 - The pre-distortion linearizer, which is composed of a RF transistor with a self base bias control circuit, is described. By applying the p-MOSFET current mirror circuit to the self base bias control circuit, the linearizer responds the envelope of the modulated signal. The linearizer realizes both positive and negative gain deviations, and compensates the distortion of any PA's. The GaAs FET power amplifier (PA), which has negative gain deviation, achieves the adjacent channel power leakage ratio (ACLR) improvement of 8.1dB by using the proposed linearizer for QPSK modulated signal with the chip rate of 3.84Mc/s. Also, the LDMOS PA, which has positive gain deviation, achieves the ACLR improvement of 8.3dB.

AB - The pre-distortion linearizer, which is composed of a RF transistor with a self base bias control circuit, is described. By applying the p-MOSFET current mirror circuit to the self base bias control circuit, the linearizer responds the envelope of the modulated signal. The linearizer realizes both positive and negative gain deviations, and compensates the distortion of any PA's. The GaAs FET power amplifier (PA), which has negative gain deviation, achieves the adjacent channel power leakage ratio (ACLR) improvement of 8.1dB by using the proposed linearizer for QPSK modulated signal with the chip rate of 3.84Mc/s. Also, the LDMOS PA, which has positive gain deviation, achieves the ACLR improvement of 8.3dB.

KW - Distortion

KW - Linearizer

KW - Power amplifiers

KW - Silicon germanium

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ER -

Pre-distortion linearizer using self base bias control circuit

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