TY - GEN
T1 - Probabilistic computing based on spintronics technology
AU - Fukami, Shunsuke
AU - Borders, William A.
AU - Pervaiz, Ahmed Z.
AU - Camsari, Kerem Y.
AU - Datta, Supriyo
AU - Ohno, Hideo
N1 - Funding Information:
ACKNOWLEDGMENTS A portion of this work has been supported by ImPACT Program of CSTI, JST-CREST JPMJCR19K3, JSPS KAKENHI 19J12206, Cooperative Research Projects of RIEC, and ASCENT, one of six centers in JUMP, an SRC program sponsored by DARPA.
Publisher Copyright:
© 2020 IEEE.
PY - 2020/6
Y1 - 2020/6
N2 - There have been increasing demands on realizing computing hardware capable of addressing complex tasks that classical von-Neumann computers cannot readily execute. Here we show an unconventional computing scheme-probabilistic computing-based on a spintronics technology, which is promising to address various computationally hard problems. We present a proof-of-concept of the probabilistic computer with stochastic magnetic tunnel junctions, that can perform optimization problems at room temperature.
AB - There have been increasing demands on realizing computing hardware capable of addressing complex tasks that classical von-Neumann computers cannot readily execute. Here we show an unconventional computing scheme-probabilistic computing-based on a spintronics technology, which is promising to address various computationally hard problems. We present a proof-of-concept of the probabilistic computer with stochastic magnetic tunnel junctions, that can perform optimization problems at room temperature.
KW - Magnetic tunnel junction
KW - Optimization problem
KW - Probabilistic computing
KW - Spintronics
UR - http://www.scopus.com/inward/record.url?scp=85092125582&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85092125582&partnerID=8YFLogxK
U2 - 10.1109/SNW50361.2020.9131622
DO - 10.1109/SNW50361.2020.9131622
M3 - Conference contribution
AN - SCOPUS:85092125582
T3 - 2020 IEEE Silicon Nanoelectronics Workshop, SNW 2020
SP - 21
EP - 22
BT - 2020 IEEE Silicon Nanoelectronics Workshop, SNW 2020
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2020 IEEE Silicon Nanoelectronics Workshop, SNW 2020
Y2 - 13 June 2020 through 14 June 2020
ER -