Abstract
This paper presents a class of complex number representations called Redundant Complex Number Systems (RCNSs), which are useful for designing VLSI signal processors with complex arithmetic capability. A redundant complex number system is defined as an imaginary-radix number system having a redundant integer digit set. This makes possible the construction of high-speed complex arithmetic circuits: examples include a complex-number parallel adder with no carry propagation chain, and a complex-number multiplier using fast binary-tree addition structure. This paper also presents the experimental fabrication of the RCNS-based complex multiplier in 0.5 μm CMOS technology.
| Original language | English |
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| Pages (from-to) | 200-207 |
| Number of pages | 8 |
| Journal | Proceedings of The International Symposium on Multiple-Valued Logic |
| Publication status | Published - 1999 |
| Event | Proceedings of the 1999 29th International Symposium on Multiple-Valued Logic (ISMVL-99) - Freiburg im Breisgau, Ger Duration: 1999 May 20 → 1999 May 22 |