TY - JOUR
T1 - Revolutional progress of silicon technologies exhibiting very high speed performance over a 50-GHz clock rate
AU - Ohmi, Tadahiro
AU - Teramoto, Akinobu
AU - Kuroda, Rihito
AU - Miyamoto, Naoto
N1 - Funding Information:
Manuscript received November 10, 2006. This work was conducted as a part of the project under Grant-in-Aid for Specially Promoted Research (Project no. 18002004), supported by Japanese Ministry of Education, Culture, Sports, Science and Technology. The review of this paper was arranged by Editor V. R. Rao.
PY - 2007/6
Y1 - 2007/6
N2 - Current silicon technologies are now facing very severe standstill, i.e., the operation speed is strictly limited at a clock rate of about 3.8 GHz due to the limitation of the thinning of the gate insulator film thickness because of its large amount of leakage currents through the current thermal oxide films. This typical disadvantage of current silicon technologies has been completely overcome by introducing the newly developed radical-reaction-based semiconductor manufacturing instead of the current molecule-reaction-based semiconductor manufacturing, i.e., direct nitridation films such as Si3 N4 where the gate leakage current through the insulator films has been confirmed to be decreased by a factor of at least three orders of magnitude. The speed performance of silicon large-scale integrations is enhanced to exhibit a clock rate of more than 50 GHz by introducing the balanced complementary MOS on a silicon (551) surface substrate using 3-D-structured MOS transistors, where new key technologies must be introduced, namely: 1) direct nitridation gate insulator film Si3N4 for 3-D MOS transistors; 2) atomic-order flat-gate insulator film/silicon interface; 3) drastically decreased series resistance of the source and drain electrodes by a factor of two orders of magnitude; and 4) introduction of the accumulation-mode MOS transistors instead of the inversion-mode MOS transistors.
AB - Current silicon technologies are now facing very severe standstill, i.e., the operation speed is strictly limited at a clock rate of about 3.8 GHz due to the limitation of the thinning of the gate insulator film thickness because of its large amount of leakage currents through the current thermal oxide films. This typical disadvantage of current silicon technologies has been completely overcome by introducing the newly developed radical-reaction-based semiconductor manufacturing instead of the current molecule-reaction-based semiconductor manufacturing, i.e., direct nitridation films such as Si3 N4 where the gate leakage current through the insulator films has been confirmed to be decreased by a factor of at least three orders of magnitude. The speed performance of silicon large-scale integrations is enhanced to exhibit a clock rate of more than 50 GHz by introducing the balanced complementary MOS on a silicon (551) surface substrate using 3-D-structured MOS transistors, where new key technologies must be introduced, namely: 1) direct nitridation gate insulator film Si3N4 for 3-D MOS transistors; 2) atomic-order flat-gate insulator film/silicon interface; 3) drastically decreased series resistance of the source and drain electrodes by a factor of two orders of magnitude; and 4) introduction of the accumulation-mode MOS transistors instead of the inversion-mode MOS transistors.
KW - CMOSFET circuits
KW - Metal-insulator-semiconductor (MIS) devices
KW - Silicon
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U2 - 10.1109/TED.2007.896391
DO - 10.1109/TED.2007.896391
M3 - Article
AN - SCOPUS:34249868191
SN - 0018-9383
VL - 54
SP - 1471
EP - 1477
JO - IEEE Transactions on Electron Devices
JF - IEEE Transactions on Electron Devices
IS - 6
ER -