S3-P4: Impact of drain conductance in InGaaS-HEMTs operated in a class-F amplifier

Tomohiro Yoshida, Taiichi Otsuji, Tetsuya Suemitsu, Masashi Oyama, Kunihiko Watanabe, Yohtaro Umeda

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Citation (Scopus)

Abstract

The Power Added Efficiency (PAE) of amplifiers operated in wave bands, such as 60 GHz, is still under 30%. A switching type amplifier consisting of ultrahigh-frequency transistors is a promising way to improve PAE. Therefore we proposed 60-GHz-band class-F amplifier with InGaAs-based high electron mobility transistors (HEMTs). In such high frequencies, the parasitic delay time is the main cause of degradation of the RF characteristics in HEMTs. In this paper, we characterized the parasitic gate delay time when the device is operated on the load line of the class-F amplifier. This result suggests us that the drain conductance affects the degradation of parasitic delay time at low drain bias condition on the load line. Hence the reduction of the source resistance and drain resistance is also important as well as the reduction of capacitance in order to improve the total performance of the amplifier.

Original languageEnglish
Title of host publicationLester Eastman Conference 2014 - High Performance Devices, LEC 2014
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781479964413
DOIs
Publication statusPublished - 2014 Nov 10
Event2014 Lester Eastman Conference on High Performance Devices, LEC 2014 - Ithaca, United States
Duration: 2014 Aug 52014 Aug 7

Publication series

NameLester Eastman Conference 2014 - High Performance Devices, LEC 2014

Conference

Conference2014 Lester Eastman Conference on High Performance Devices, LEC 2014
Country/TerritoryUnited States
CityIthaca
Period14/8/514/8/7

Keywords

  • Class F
  • Delay time anarysis
  • InGaAs-HEMTs
  • Millimater Wave
  • PAE

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