Self-Assembly Based 3D and Heterointegration

Takafumi Fukushima, Jicheol Bea

Research output: Chapter in Book/Report/Conference proceedingChapterpeer-review

1 Citation (Scopus)


In order to improve assembly throughput and production yield in chip-on-wafer 3D integration, surface tension-driven chip self-assembly technologies have been proposed. Small volume of liquid droplets can precisely assemble a large number of known good dies on host wafers at the sub-micrometer accuracy level. Here, impact of several parameters on alignment accuracies are described. In addition, this chapter introduces interconnect technologies of self-assembled chips in a face-up or face-down bonding fashion to the host wafers with metal microbumps.

Original languageEnglish
Title of host publication3D Process Technology
Number of pages10
ISBN (Electronic)9783527670109
ISBN (Print)9783527334667
Publication statusPublished - 2014 Jul 21


  • 3D chip stacking
  • 3D hetero integration
  • Alignment accuracies
  • Flip-chip bonding
  • Microbumps
  • Self-assembly


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