SiGe-channel 0.1-μm pMOSFETs with super self-aligned ultra-shallow junction formed by selective in-situ B-doped SiGe CVD

D. Lee; M. Sakuraba; T. Matsuura; Junichi Murota; T. Tsuchiya

doi:10.1109/DRC.2002.1029525

SiGe-channel 0.1-μm pMOSFETs with super self-aligned ultra-shallow junction formed by selective in-situ B-doped SiGe CVD

D. Lee, M. Sakuraba, T. Matsuura, Junichi Murota, T. Tsuchiya

Information Devices Division

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

Abstract

As the feature size of MOSFETs becomes increasingly small, the super self-aligned process is extremely important for the progress of ULSIs. The improvement of carrier mobility in the channel region is also indispensable. It has been reported that the introduction of high-quality Si_1-xGe_x with x≈0.5 in the channel region drastically improves the pMOSFET performance. In this paper, it is shown that SiGe-channel 0.1-μm pMOSFETs with super self-aligned ultra-shallow junction formed by selective in-situ B-doped SiGe chemical vapor deposition (CVD) have been successfully realized. The schematic device structure is described along with the fabrication process flow.

Original language	English
Title of host publication	60th Device Research Conference, DRC 2002
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	83-84
Number of pages	2
ISBN (Electronic)	0780373170
DOIs	https://doi.org/10.1109/DRC.2002.1029525
Publication status	Published - 2002
Event	60th Device Research Conference, DRC 2002 - Santa Barbara, United States Duration: 2002 Jun 24 → 2002 Jun 26

Publication series

Name	Device Research Conference - Conference Digest, DRC
Volume	2002-January
ISSN (Print)	1548-3770

Other

Other	60th Device Research Conference, DRC 2002
Country/Territory	United States
City	Santa Barbara
Period	02/6/24 → 02/6/26

Keywords

Electrodes
Fabrication
Flowcharts
MOSFET circuits
Threshold voltage

ASJC Scopus subject areas

Electrical and Electronic Engineering

Access to Document

10.1109/DRC.2002.1029525

Cite this

Lee, D., Sakuraba, M., Matsuura, T., Murota, J., & Tsuchiya, T. (2002). SiGe-channel 0.1-μm pMOSFETs with super self-aligned ultra-shallow junction formed by selective in-situ B-doped SiGe CVD. In 60th Device Research Conference, DRC 2002 (pp. 83-84). [1029525] (Device Research Conference - Conference Digest, DRC; Vol. 2002-January). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/DRC.2002.1029525

SiGe-channel 0.1-μm pMOSFETs with super self-aligned ultra-shallow junction formed by selective in-situ B-doped SiGe CVD. / Lee, D.; Sakuraba, M.; Matsuura, T. et al.
60th Device Research Conference, DRC 2002. Institute of Electrical and Electronics Engineers Inc., 2002. p. 83-84 1029525 (Device Research Conference - Conference Digest, DRC; Vol. 2002-January).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Lee, D, Sakuraba, M, Matsuura, T, Murota, J & Tsuchiya, T 2002, SiGe-channel 0.1-μm pMOSFETs with super self-aligned ultra-shallow junction formed by selective in-situ B-doped SiGe CVD. in 60th Device Research Conference, DRC 2002., 1029525, Device Research Conference - Conference Digest, DRC, vol. 2002-January, Institute of Electrical and Electronics Engineers Inc., pp. 83-84, 60th Device Research Conference, DRC 2002, Santa Barbara, United States, 02/6/24. https://doi.org/10.1109/DRC.2002.1029525

Lee D, Sakuraba M, Matsuura T, Murota J, Tsuchiya T. SiGe-channel 0.1-μm pMOSFETs with super self-aligned ultra-shallow junction formed by selective in-situ B-doped SiGe CVD. In 60th Device Research Conference, DRC 2002. Institute of Electrical and Electronics Engineers Inc. 2002. p. 83-84. 1029525. (Device Research Conference - Conference Digest, DRC). doi: 10.1109/DRC.2002.1029525

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title = "SiGe-channel 0.1-μm pMOSFETs with super self-aligned ultra-shallow junction formed by selective in-situ B-doped SiGe CVD",

abstract = "As the feature size of MOSFETs becomes increasingly small, the super self-aligned process is extremely important for the progress of ULSIs. The improvement of carrier mobility in the channel region is also indispensable. It has been reported that the introduction of high-quality Si1-xGex with x≈0.5 in the channel region drastically improves the pMOSFET performance. In this paper, it is shown that SiGe-channel 0.1-μm pMOSFETs with super self-aligned ultra-shallow junction formed by selective in-situ B-doped SiGe chemical vapor deposition (CVD) have been successfully realized. The schematic device structure is described along with the fabrication process flow.",

keywords = "Electrodes, Fabrication, Flowcharts, MOSFET circuits, Threshold voltage",

author = "D. Lee and M. Sakuraba and T. Matsuura and Junichi Murota and T. Tsuchiya",

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AU - Murota, Junichi

AU - Tsuchiya, T.

PY - 2002

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N2 - As the feature size of MOSFETs becomes increasingly small, the super self-aligned process is extremely important for the progress of ULSIs. The improvement of carrier mobility in the channel region is also indispensable. It has been reported that the introduction of high-quality Si1-xGex with x≈0.5 in the channel region drastically improves the pMOSFET performance. In this paper, it is shown that SiGe-channel 0.1-μm pMOSFETs with super self-aligned ultra-shallow junction formed by selective in-situ B-doped SiGe chemical vapor deposition (CVD) have been successfully realized. The schematic device structure is described along with the fabrication process flow.

AB - As the feature size of MOSFETs becomes increasingly small, the super self-aligned process is extremely important for the progress of ULSIs. The improvement of carrier mobility in the channel region is also indispensable. It has been reported that the introduction of high-quality Si1-xGex with x≈0.5 in the channel region drastically improves the pMOSFET performance. In this paper, it is shown that SiGe-channel 0.1-μm pMOSFETs with super self-aligned ultra-shallow junction formed by selective in-situ B-doped SiGe chemical vapor deposition (CVD) have been successfully realized. The schematic device structure is described along with the fabrication process flow.

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KW - Fabrication

KW - Flowcharts

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KW - Threshold voltage

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SiGe-channel 0.1-μm pMOSFETs with super self-aligned ultra-shallow junction formed by selective in-situ B-doped SiGe CVD

Abstract

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Keywords

ASJC Scopus subject areas

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