@inproceedings{acc3b783b86341f0be53dc1810bde641,
title = "Specification and verification of digital logic and PLCs using an automaton model with delays",
abstract = "Some techniques and languages which support the design of digital logic hare been traditionally presented. In this paper, we propose a new automaton model which enables to concisely specify digital logic and PLCs Including delay and time-control by Introducing two kinds of delays. Moreover, we develop a support tool which can Intelligibly simulate the behavior of a system specified by this automaton model.",
keywords = "Automata, Digital logic, PLC, Specification, Verification",
author = "Satoru Izumi and Kazuhiro Yamanaka and Yasushi Kato and Kaoru Takahashi",
year = "2005",
language = "English",
isbn = "0780392833",
series = "2005 Fifth International Conference on Information, Communications and Signal Processing",
pages = "1421--1424",
booktitle = "2005 Fifth International Conference on Information, Communications and Signal Processing",
note = "2005 Fifth International Conference on Information, Communications and Signal Processing ; Conference date: 06-12-2005 Through 09-12-2005",
}