Abstract
The ternary T-gate can be used as a basic building block to construct both combinational and sequential circuits. Since the T-gate is one kind of tree-type universal logic module, any combinational circuit can be built up with modular logic arrays. For constructing ternary memory elements, however, the T-gate is required to be static hazard-free. A theoretical study is done on the necessary conditions for the practical realization of the static-hazard-free T-gate. On the basis of the result obtained, the static-hazard-free T-gate is realized using the ECL technique. The static-hazard-free T-gates obtained here can be used as building blocks to construct memory elements. Various memory elements such as D flip-flap-flop(FFF), D master-slave FFF, B master-slave FFF, and counting FFF is constructed easily. Using these memory elements, three different types of ternary counters can be designed and realized. They are an asynchronous signed ternary counter, a synchronous signed ternary counter, and a counter based on a shift register. Their design methods are discussed. These ternary counters are superior to the binary ones in that the up-down counting can easily be carried out by one input signal.
Original language | English |
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Pages (from-to) | 1212-1221 |
Number of pages | 10 |
Journal | IEEE Transactions on Computers |
Volume | C-26 |
Issue number | 12 |
DOIs | |
Publication status | Published - 1977 Dec |
Externally published | Yes |
Keywords
- Counter based on shift register
- Emitter coupled logic (ECL)
- Feedback shift register (FSR)
- Signed ternary number representation
- Static-hazard-free T-gate
- Symmetrical modulo-M counter
- Synchronous and asynchronous signed ternary counter
- Ternary memory element
- Up-down counting
ASJC Scopus subject areas
- Software
- Theoretical Computer Science
- Hardware and Architecture
- Computational Theory and Mathematics