STT-MRAM and NV-Logic for low power systems

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Citation (Scopus)

Abstract

Recently in semiconductor memories, it is becoming difficult to meet the target performance requirements by technology development based solely on device scaling. Especially, due to the increase in memory capacity, increased operation speed and increased leakage current of MOSFET, the power consumption of LSI is rapidly increasing.

Original languageEnglish
Title of host publication2013 3rd Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2013 - Proceedings
DOIs
Publication statusPublished - 2013
Event2013 3rd Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2013 - Berkeley, CA, United States
Duration: 2013 Oct 282013 Oct 29

Publication series

Name2013 3rd Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2013 - Proceedings

Conference

Conference2013 3rd Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2013
Country/TerritoryUnited States
CityBerkeley, CA
Period13/10/2813/10/29

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