Study of Stochastic Invertible Multiplier Designs

Kaito Nishino; Sean C. Smithson; Naoya Onizawa; Brett H. Meyer; Warren J. Gross; Hitoshi Yamagata; Hiroyuki Fujita; Takahiro Hanyu

doi:10.1109/ICECS.2018.8618039

Study of Stochastic Invertible Multiplier Designs

Kaito Nishino, Sean C. Smithson, Naoya Onizawa, Brett H. Meyer, Warren J. Gross, Hitoshi Yamagata, Hiroyuki Fujita, Takahiro Hanyu

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

3 Citations (Scopus)

Abstract

Invertible logic is a method of reversible computing that can propagate a circuit signal backward from outputs. For example, not only multiplication (forward operation) but also division and factorization (backward operation) can be performed by this circuit style of a single multiplier. Currently, invertible logic has been able to realize only small-scale circuits. In this paper, we design larger-scale circuits than that reported conventionally, using stochastic computing. Furthermore, we also verify the performance of invertible logic using three different multipliers.

Original language	English
Title of host publication	2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	649-650
Number of pages	2
ISBN (Electronic)	9781538695623
DOIs	https://doi.org/10.1109/ICECS.2018.8618039
Publication status	Published - 2019 Jan 17
Event	25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018 - Bordeaux, France Duration: 2018 Dec 9 → 2018 Dec 12

Publication series

Name	2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018

Conference

Conference	25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018
Country/Territory	France
City	Bordeaux
Period	18/12/9 → 18/12/12

Keywords

Bidirectional computation
Factorization
Hamiltonian
Multiplier
Stochastic computing

ASJC Scopus subject areas

Electrical and Electronic Engineering
Instrumentation

Access to Document

10.1109/ICECS.2018.8618039

Cite this

Nishino, K., Smithson, S. C., Onizawa, N., Meyer, B. H., Gross, W. J., Yamagata, H., Fujita, H., & Hanyu, T. (2019). Study of Stochastic Invertible Multiplier Designs. In 2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018 (pp. 649-650). [8618039] (2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICECS.2018.8618039

Study of Stochastic Invertible Multiplier Designs. / Nishino, Kaito; Smithson, Sean C.; Onizawa, Naoya et al.
2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018. Institute of Electrical and Electronics Engineers Inc., 2019. p. 649-650 8618039 (2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Nishino, K, Smithson, SC, Onizawa, N, Meyer, BH, Gross, WJ, Yamagata, H, Fujita, H & Hanyu, T 2019, Study of Stochastic Invertible Multiplier Designs. in 2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018., 8618039, 2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018, Institute of Electrical and Electronics Engineers Inc., pp. 649-650, 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018, Bordeaux, France, 18/12/9. https://doi.org/10.1109/ICECS.2018.8618039

Nishino K, Smithson SC, Onizawa N, Meyer BH, Gross WJ, Yamagata H et al. Study of Stochastic Invertible Multiplier Designs. In 2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018. Institute of Electrical and Electronics Engineers Inc. 2019. p. 649-650. 8618039. (2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018). doi: 10.1109/ICECS.2018.8618039

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abstract = "Invertible logic is a method of reversible computing that can propagate a circuit signal backward from outputs. For example, not only multiplication (forward operation) but also division and factorization (backward operation) can be performed by this circuit style of a single multiplier. Currently, invertible logic has been able to realize only small-scale circuits. In this paper, we design larger-scale circuits than that reported conventionally, using stochastic computing. Furthermore, we also verify the performance of invertible logic using three different multipliers.",

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Study of Stochastic Invertible Multiplier Designs

Abstract

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Keywords

ASJC Scopus subject areas

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