TY - JOUR
T1 - Sudden Power-Outage Resilient In-Processor Checkpointing for Energy-Harvesting Nonvolatile Processors
AU - Onizawa, Naoya
AU - Mochizuki, Akira
AU - Tamakoshi, Akira
AU - Hanyu, Takahiro
N1 - Funding Information:
This work was supported by R & D Project for ICT Key Technology of MEXT and JSPS KAKENHI Grant Number 26700003.
Publisher Copyright:
© 2013 IEEE.
PY - 2017/4/1
Y1 - 2017/4/1
N2 - This paper introduces a sudden power-outage resilient in-processor checkpointing for energy-harvesting nonvolatile processors. In energy harvesting applications, a power supply generated from a renewable power source is unstable that may induce frequent sudden power outages, causing the inconsistency among distributed nonvolatile flip-flops (NVFFs) and hence failure rollbacks in conventional nonvolatile processors. To realize continuous operations upon the frequent sudden power outages, the proposed in-processor checkpointing technique fixes the inconsistency using time-reminding redundant NVFFs (TM-RNVFFs). The TM-RNVFFs store the current and the past few data with the timing information of storing. If several NVFFs fail to store the current data due to the sudden power outages, the proposed in-processor checkpointing technique exploits the timing information to find the common newest state among distributed NVFFs, leading to correct rollbacks to the state with consistency. The sudden power-outage effect is modeled to perform design space explorations at different configurations, such as redundancy and checkpointing period. Nonvolatile ARM Cortex-M0 processors are designed using hybrid 90 nm CMOS and 70 nm magnetic tunnel junction (MTJ) technologies. Based on the design space explorations, the proposed nonvolatile processor achieves a several order-of magnitude reduction in rollback error probability with a power dissipation overhead of 11.6 percent and an area overhead of 52.1 percent in comparison with the conventional nonvolatile processor.
AB - This paper introduces a sudden power-outage resilient in-processor checkpointing for energy-harvesting nonvolatile processors. In energy harvesting applications, a power supply generated from a renewable power source is unstable that may induce frequent sudden power outages, causing the inconsistency among distributed nonvolatile flip-flops (NVFFs) and hence failure rollbacks in conventional nonvolatile processors. To realize continuous operations upon the frequent sudden power outages, the proposed in-processor checkpointing technique fixes the inconsistency using time-reminding redundant NVFFs (TM-RNVFFs). The TM-RNVFFs store the current and the past few data with the timing information of storing. If several NVFFs fail to store the current data due to the sudden power outages, the proposed in-processor checkpointing technique exploits the timing information to find the common newest state among distributed NVFFs, leading to correct rollbacks to the state with consistency. The sudden power-outage effect is modeled to perform design space explorations at different configurations, such as redundancy and checkpointing period. Nonvolatile ARM Cortex-M0 processors are designed using hybrid 90 nm CMOS and 70 nm magnetic tunnel junction (MTJ) technologies. Based on the design space explorations, the proposed nonvolatile processor achieves a several order-of magnitude reduction in rollback error probability with a power dissipation overhead of 11.6 percent and an area overhead of 52.1 percent in comparison with the conventional nonvolatile processor.
KW - MTJ
KW - checkpointing
KW - energy harvesting
KW - nonvolatile processor
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U2 - 10.1109/TETC.2016.2604083
DO - 10.1109/TETC.2016.2604083
M3 - Article
AN - SCOPUS:85027042384
SN - 2168-6750
VL - 5
SP - 151
EP - 163
JO - IEEE Transactions on Emerging Topics in Computing
JF - IEEE Transactions on Emerging Topics in Computing
IS - 2
ER -