SYNTHESIS OF OPTIMAL T-GATE NETWORKS IN MULTIPLE-VALUED LOGIC.

Michitaka Kameyama; Tatsuo Higuchi

SYNTHESIS OF OPTIMAL T-GATE NETWORKS IN MULTIPLE-VALUED LOGIC.

Michitaka Kameyama, Tatsuo Higuchi

INF - Computer and Mathematical Sciences

Research output: Contribution to journal › Conference article › peer-review

3 Citations (Scopus)

Abstract

A synthesis is presented of multiple-valued logic networks with the minimum number of T-gates. A ULM implicant is defined in the multiple-valued logic system. One ULM implicant implies a possible reduction of a certain number of T-gates in a tree structure. The optimal T-gate network is obtained by finding the compatible set of ULM implicants containing the possible reduction of the maximum number of T-gates. An implicit enumeration method is introduced in the synthesis algorithm so that the optimal compatible set can be found in a short computation time. The method is also developed for synthesizing a tree structure using equal residue functions.

Original language	English
Pages (from-to)	190-195
Number of pages	6
Journal	Proceedings of The International Symposium on Multiple-Valued Logic
Publication status	Published - 1979 Jan 1
Event	Proc Int Symp Mult Valued Logic 9th - Bath, Engl Duration: 1979 May 29 → 1979 May 31

ASJC Scopus subject areas

Computer Science(all)
Mathematics(all)

Cite this

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title = "SYNTHESIS OF OPTIMAL T-GATE NETWORKS IN MULTIPLE-VALUED LOGIC.",

abstract = "A synthesis is presented of multiple-valued logic networks with the minimum number of T-gates. A ULM implicant is defined in the multiple-valued logic system. One ULM implicant implies a possible reduction of a certain number of T-gates in a tree structure. The optimal T-gate network is obtained by finding the compatible set of ULM implicants containing the possible reduction of the maximum number of T-gates. An implicit enumeration method is introduced in the synthesis algorithm so that the optimal compatible set can be found in a short computation time. The method is also developed for synthesizing a tree structure using equal residue functions.",

author = "Michitaka Kameyama and Tatsuo Higuchi",

year = "1979",

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language = "English",

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journal = "Proceedings of The International Symposium on Multiple-Valued Logic",

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note = "Proc Int Symp Mult Valued Logic 9th ; Conference date: 29-05-1979 Through 31-05-1979",

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T1 - SYNTHESIS OF OPTIMAL T-GATE NETWORKS IN MULTIPLE-VALUED LOGIC.

AU - Kameyama, Michitaka

AU - Higuchi, Tatsuo

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Y1 - 1979/1/1

N2 - A synthesis is presented of multiple-valued logic networks with the minimum number of T-gates. A ULM implicant is defined in the multiple-valued logic system. One ULM implicant implies a possible reduction of a certain number of T-gates in a tree structure. The optimal T-gate network is obtained by finding the compatible set of ULM implicants containing the possible reduction of the maximum number of T-gates. An implicit enumeration method is introduced in the synthesis algorithm so that the optimal compatible set can be found in a short computation time. The method is also developed for synthesizing a tree structure using equal residue functions.

AB - A synthesis is presented of multiple-valued logic networks with the minimum number of T-gates. A ULM implicant is defined in the multiple-valued logic system. One ULM implicant implies a possible reduction of a certain number of T-gates in a tree structure. The optimal T-gate network is obtained by finding the compatible set of ULM implicants containing the possible reduction of the maximum number of T-gates. An implicit enumeration method is introduced in the synthesis algorithm so that the optimal compatible set can be found in a short computation time. The method is also developed for synthesizing a tree structure using equal residue functions.

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M3 - Conference article

AN - SCOPUS:0018320918

SN - 0195-623X

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EP - 195

JO - Proceedings of The International Symposium on Multiple-Valued Logic

JF - Proceedings of The International Symposium on Multiple-Valued Logic

T2 - Proc Int Symp Mult Valued Logic 9th

Y2 - 29 May 1979 through 31 May 1979

ER -

SYNTHESIS OF OPTIMAL T-GATE NETWORKS IN MULTIPLE-VALUED LOGIC.

Abstract

ASJC Scopus subject areas

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