Three-dimensional super-chip integration technology using self-assembly technique

Mitsumasa Koyanagi; Takafumi Fukushima; Tetsu Tanaka

doi:10.1109/SNW.2008.5418453

Three-dimensional super-chip integration technology using self-assembly technique

Mitsumasa Koyanagi, Takafumi Fukushima, Tetsu Tanaka

Tohoku University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Original language	English
Title of host publication	IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008
DOIs	https://doi.org/10.1109/SNW.2008.5418453
Publication status	Published - 2008
Event	IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008 - Honolulu, HI, United States Duration: 2008 Jun 15 → 2008 Jun 16

Publication series

Name	IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008

Conference

Conference	IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008
Country/Territory	United States
City	Honolulu, HI
Period	08/6/15 → 08/6/16

Access to Document

10.1109/SNW.2008.5418453

Cite this

@inproceedings{d898227d598842c2b680a37d30b71a57,

title = "Three-dimensional super-chip integration technology using self-assembly technique",

author = "Mitsumasa Koyanagi and Takafumi Fukushima and Tetsu Tanaka",

year = "2008",

doi = "10.1109/SNW.2008.5418453",

language = "English",

isbn = "9781424420711",

series = "IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008",

booktitle = "IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008",

note = "IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008 ; Conference date: 15-06-2008 Through 16-06-2008",

}

Koyanagi, M, Fukushima, T & Tanaka, T 2008, Three-dimensional super-chip integration technology using self-assembly technique. in IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008., 5418453, IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008, IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008, Honolulu, HI, United States, 08/6/15. https://doi.org/10.1109/SNW.2008.5418453

Three-dimensional super-chip integration technology using self-assembly technique. / Koyanagi, Mitsumasa; Fukushima, Takafumi ; Tanaka, Tetsu.
IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008. 2008. 5418453 (IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Three-dimensional super-chip integration technology using self-assembly technique

AU - Koyanagi, Mitsumasa

AU - Fukushima, Takafumi

AU - Tanaka, Tetsu

PY - 2008

Y1 - 2008

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U2 - 10.1109/SNW.2008.5418453

DO - 10.1109/SNW.2008.5418453

M3 - Conference contribution

AN - SCOPUS:77949984520

SN - 9781424420711

T3 - IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008

BT - IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008

T2 - IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008

Y2 - 15 June 2008 through 16 June 2008

ER -

Three-dimensional super-chip integration technology using self-assembly technique

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