Triple-Stacked Au/SiO2 Hybrid Bonding with 6-μm-Pitch Au Electrodes on Silicon-on-Insulator Substrates Using O2 Plasma Surface Activation for 3-D Integration

Yuki Honda, Masahide Goto, Toshihisa Watabe, Kei Hagiwara, Masakazu Nanba, Yoshinori Iguchi, Takuya Saraya, Masaharu Kobayashi, Eiji Higurashi, Hiroshi Toshiyoshi, Toshiro Hiramoto

Research output: Contribution to journalArticlepeer-review

1 Citation (Scopus)

Abstract

In this paper, we have developed multilayer bonding technology to stack complementary metal-oxide semiconductor (CMOS) circuits. The steps include repeated embedding of gold (Au) electrodes, hybrid bonding of Au and SiO2 on a silicon-on-insulator (SOI) substrate using surface activation with O2 plasma, and subsequent elimination of the Si substrate. Furthermore, the characteristics of Au/SiO2 hybrid bonding via O2 plasma are tested with the fabrication of a triple-stacked daisy-chain test device using 3-μm-diameter Au electrodes at a pitch of μ m. When the surface is activated using O2 plasma before bonding, the bonding strength increases approximately four times stronger than that when the surface activation is performed with sequential plasmas of Ar and O2. This additional strength ensures that the bonded interface remains intact while the layers are stacked. A prototype device is manufactured with alignment errors of approximately 0.4μm at the center and approximately 1 μm at the corners. No voids are seen in the two bonded interfaces, and more than 984 000 Au contacts are produced, each having an average resistance of 92.8 mΩ. These results indicate that the proposed multilayer stacking technology is promising for developing high-performance 3-D integrated circuits, 3-D integrated CMOS image sensors, and microelectromechanical systems based on SOI substrates.

Original languageEnglish
Article number8689092
Pages (from-to)1904-1911
Number of pages8
JournalIEEE Transactions on Components, Packaging and Manufacturing Technology
Volume9
Issue number9
DOIs
Publication statusPublished - 2019 Sept
Externally publishedYes

Keywords

  • 3-D integrated circuits
  • bonding processes
  • complementary metal-oxide semiconductor (CMOS) integrated circuits (ICs)
  • image sensors
  • silicon-on-insulator
  • wafer bonding

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Industrial and Manufacturing Engineering
  • Electrical and Electronic Engineering

Fingerprint

Dive into the research topics of 'Triple-Stacked Au/SiO2 Hybrid Bonding with 6-μm-Pitch Au Electrodes on Silicon-on-Insulator Substrates Using O2 Plasma Surface Activation for 3-D Integration'. Together they form a unique fingerprint.

Cite this