TSV (Through-Si-Via) formation technologies for three-dimensionally stacked chips

Takafumi Fukushima; Tetsu Tanaka; Mitsumasa Koyanagi

doi:10.5104/jiep.12.104

TSV (Through-Si-Via) formation technologies for three-dimensionally stacked chips

Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi

Research output: Contribution to journal › Article › peer-review

Original language	English
Pages (from-to)	104-109
Number of pages	6
Journal	Journal of Japan Institute of Electronics Packaging
Volume	12
Issue number	2
DOIs	https://doi.org/10.5104/jiep.12.104
Publication status	Published - 2009 Mar

ASJC Scopus subject areas

Electrical and Electronic Engineering

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10.5104/jiep.12.104

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@article{fe8c2ed7c635409194c8a6b89a097f3b,

title = "TSV (Through-Si-Via) formation technologies for three-dimensionally stacked chips",

author = "Takafumi Fukushima and Tetsu Tanaka and Mitsumasa Koyanagi",

year = "2009",

month = mar,

doi = "10.5104/jiep.12.104",

language = "English",

volume = "12",

pages = "104--109",

journal = "Journal of Japan Institute of Electronics Packaging",

issn = "1343-9677",

publisher = "The Japan Institute of Electronics Packaging",

number = "2",

}

TY - JOUR

T1 - TSV (Through-Si-Via) formation technologies for three-dimensionally stacked chips

AU - Fukushima, Takafumi

AU - Tanaka, Tetsu

AU - Koyanagi, Mitsumasa

PY - 2009/3

Y1 - 2009/3

UR - http://www.scopus.com/inward/record.url?scp=79951929220&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=79951929220&partnerID=8YFLogxK

U2 - 10.5104/jiep.12.104

DO - 10.5104/jiep.12.104

M3 - Article

AN - SCOPUS:79951929220

SN - 1343-9677

VL - 12

SP - 104

EP - 109

JO - Journal of Japan Institute of Electronics Packaging

JF - Journal of Japan Institute of Electronics Packaging

IS - 2

ER -

TSV (Through-Si-Via) formation technologies for three-dimensionally stacked chips

ASJC Scopus subject areas

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