Ultra-high-speed distributed selector IC using GaAs MESFETs

K. Murata; T. Otsuji; Y. Imai

doi:10.1049/el:19981664

Ultra-high-speed distributed selector IC using GaAs MESFETs

K. Murata, T. Otsuji, Y. Imai

RIEC - Information Communication Platforms Division

Nippon Telegraph & Telephone

Research output: Contribution to journal › Article › peer-review

1 Citation (Scopus)

Abstract

A novel distributed digital selector circuit is proposed. The circuit comprises eight stages of series-gated source coupled FET logic (SCFL) selector cell units, and can be directly connected to an SCFL interface. The integrated circuit (IC) fabricated with 0.16μm GaAs MESFETs exhibited clear eye-openings at 70Gbit/ s, a much higher bit rate than that of conventional selector ICs based on a lumped-element circuit design.

Original language	English
Pages (from-to)	2442-2444
Number of pages	3
Journal	Electronics Letters
Volume	34
Issue number	25
DOIs	https://doi.org/10.1049/el:19981664
Publication status	Published - 1998 Dec 10

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title = "Ultra-high-speed distributed selector IC using GaAs MESFETs",

abstract = "A novel distributed digital selector circuit is proposed. The circuit comprises eight stages of series-gated source coupled FET logic (SCFL) selector cell units, and can be directly connected to an SCFL interface. The integrated circuit (IC) fabricated with 0.16μm GaAs MESFETs exhibited clear eye-openings at 70Gbit/ s, a much higher bit rate than that of conventional selector ICs based on a lumped-element circuit design.",

author = "K. Murata and T. Otsuji and Y. Imai",

year = "1998",

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N2 - A novel distributed digital selector circuit is proposed. The circuit comprises eight stages of series-gated source coupled FET logic (SCFL) selector cell units, and can be directly connected to an SCFL interface. The integrated circuit (IC) fabricated with 0.16μm GaAs MESFETs exhibited clear eye-openings at 70Gbit/ s, a much higher bit rate than that of conventional selector ICs based on a lumped-element circuit design.

AB - A novel distributed digital selector circuit is proposed. The circuit comprises eight stages of series-gated source coupled FET logic (SCFL) selector cell units, and can be directly connected to an SCFL interface. The integrated circuit (IC) fabricated with 0.16μm GaAs MESFETs exhibited clear eye-openings at 70Gbit/ s, a much higher bit rate than that of conventional selector ICs based on a lumped-element circuit design.

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Ultra-high-speed distributed selector IC using GaAs MESFETs

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