TY - GEN
T1 - Unified current-source control for low-power current-mode-logic bit-serial circuits
AU - Kisara, Shogo
AU - Kameyama, Michitaka
PY - 2012
Y1 - 2012
N2 - This paper presents a low-power multiple-valued VLSI based on two current-source control techniques. The first technique is a current-source control based on valid data signal detection. The other technique is a current-source control such that current sources are turned off within a clock cycle after a logic operation completion signal is detected. In a multiple-valued reconfigurable VLSI, power consumption of a cell with the low-power technique is reduced to 49% in comparison with that of the cell without the low-power technique, when the operating frequency is500MHz, and the utilization ratio of the cell is 25%.
AB - This paper presents a low-power multiple-valued VLSI based on two current-source control techniques. The first technique is a current-source control based on valid data signal detection. The other technique is a current-source control such that current sources are turned off within a clock cycle after a logic operation completion signal is detected. In a multiple-valued reconfigurable VLSI, power consumption of a cell with the low-power technique is reduced to 49% in comparison with that of the cell without the low-power technique, when the operating frequency is500MHz, and the utilization ratio of the cell is 25%.
KW - Current-mode circuit
KW - Current-source control
KW - Multiple-valued logic
KW - Reconfigurable VLSI
UR - http://www.scopus.com/inward/record.url?scp=84864267968&partnerID=8YFLogxK
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U2 - 10.1109/ISMVL.2012.55
DO - 10.1109/ISMVL.2012.55
M3 - Conference contribution
AN - SCOPUS:84864267968
SN - 9780769546735
T3 - Proceedings of The International Symposium on Multiple-Valued Logic
SP - 104
EP - 109
BT - Proceedings - IEEE 42nd International Symposium on Multiple-Valued Logic, ISMVL 2012
T2 - 42nd IEEE International Symposium on Multiple-Valued Logic, ISMVL 2012
Y2 - 14 May 2012 through 16 May 2012
ER -