Vertical double-gate MOSFET device technology

Meishoku Masahara; Yongxun Liu; Kazuhiko Endo; Takashi Matsukawa; Eiichi Suzuki

doi:10.1541/ieejeiss.126.702

Vertical double-gate MOSFET device technology

Meishoku Masahara, Yongxun Liu, Kazuhiko Endo, Takashi Matsukawa, Eiichi Suzuki

Research output: Contribution to journal › Article › peer-review

1 Citation (Scopus)

Abstract

The Silicon device technology is facing to several difficulties. Especially, explosion of power consumption due to short channel effects (SCEs) becomes the biggest issue in f urther device scaling down. Fortunately, double-gate (DG) MOSFETs have promising potential to overcome this obstacle. The DG-MOSFET is recognized to be the most scalable MOSFET for its high SCEs immunity. In addition, independent DG-MOSFET (4T-DG-MOSFET) has great advantage to enable the threshold voltage control for the flexible power management. Through this work, we have realized ideal DG-MOSFETs using newly-developed vertical DG-MOSFET device technology. This article presents the effectiveness of the vertical DG-MOSFETs in future high-performance and ultra-low-power CMOS circuits.

Original language	English
Pages (from-to)	702-707+2
Journal	IEEJ Transactions on Electronics, Information and Systems
Volume	126
Issue number	6
DOIs	https://doi.org/10.1541/ieejeiss.126.702
Publication status	Published - 2006
Externally published	Yes

Keywords

4-terminal DG-MOSFET
IBRE
SCEs
Vertical-type DG-MOSFET

ASJC Scopus subject areas

Electrical and Electronic Engineering

Access to Document

10.1541/ieejeiss.126.702

Cite this

@article{99fde11ab913460ca5a5057094865cc8,

title = "Vertical double-gate MOSFET device technology",

abstract = "The Silicon device technology is facing to several difficulties. Especially, explosion of power consumption due to short channel effects (SCEs) becomes the biggest issue in f urther device scaling down. Fortunately, double-gate (DG) MOSFETs have promising potential to overcome this obstacle. The DG-MOSFET is recognized to be the most scalable MOSFET for its high SCEs immunity. In addition, independent DG-MOSFET (4T-DG-MOSFET) has great advantage to enable the threshold voltage control for the flexible power management. Through this work, we have realized ideal DG-MOSFETs using newly-developed vertical DG-MOSFET device technology. This article presents the effectiveness of the vertical DG-MOSFETs in future high-performance and ultra-low-power CMOS circuits.",

keywords = "4-terminal DG-MOSFET, IBRE, SCEs, Vertical-type DG-MOSFET",

author = "Meishoku Masahara and Yongxun Liu and Kazuhiko Endo and Takashi Matsukawa and Eiichi Suzuki",

year = "2006",

doi = "10.1541/ieejeiss.126.702",

language = "English",

volume = "126",

pages = "702--707+2",

journal = "IEEJ Transactions on Electronics, Information and Systems",

issn = "0385-4221",

publisher = "The Institute of Electrical Engineers of Japan",

number = "6",

}

TY - JOUR

T1 - Vertical double-gate MOSFET device technology

AU - Masahara, Meishoku

AU - Liu, Yongxun

AU - Endo, Kazuhiko

AU - Matsukawa, Takashi

AU - Suzuki, Eiichi

PY - 2006

Y1 - 2006

N2 - The Silicon device technology is facing to several difficulties. Especially, explosion of power consumption due to short channel effects (SCEs) becomes the biggest issue in f urther device scaling down. Fortunately, double-gate (DG) MOSFETs have promising potential to overcome this obstacle. The DG-MOSFET is recognized to be the most scalable MOSFET for its high SCEs immunity. In addition, independent DG-MOSFET (4T-DG-MOSFET) has great advantage to enable the threshold voltage control for the flexible power management. Through this work, we have realized ideal DG-MOSFETs using newly-developed vertical DG-MOSFET device technology. This article presents the effectiveness of the vertical DG-MOSFETs in future high-performance and ultra-low-power CMOS circuits.

AB - The Silicon device technology is facing to several difficulties. Especially, explosion of power consumption due to short channel effects (SCEs) becomes the biggest issue in f urther device scaling down. Fortunately, double-gate (DG) MOSFETs have promising potential to overcome this obstacle. The DG-MOSFET is recognized to be the most scalable MOSFET for its high SCEs immunity. In addition, independent DG-MOSFET (4T-DG-MOSFET) has great advantage to enable the threshold voltage control for the flexible power management. Through this work, we have realized ideal DG-MOSFETs using newly-developed vertical DG-MOSFET device technology. This article presents the effectiveness of the vertical DG-MOSFETs in future high-performance and ultra-low-power CMOS circuits.

KW - 4-terminal DG-MOSFET

KW - IBRE

KW - SCEs

KW - Vertical-type DG-MOSFET

UR - http://www.scopus.com/inward/record.url?scp=33745635856&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=33745635856&partnerID=8YFLogxK

U2 - 10.1541/ieejeiss.126.702

DO - 10.1541/ieejeiss.126.702

M3 - Article

AN - SCOPUS:33745635856

SN - 0385-4221

VL - 126

SP - 702-707+2

JO - IEEJ Transactions on Electronics, Information and Systems

JF - IEEJ Transactions on Electronics, Information and Systems

IS - 6

ER -

Vertical double-gate MOSFET device technology

Abstract

Keywords

ASJC Scopus subject areas

Access to Document

Other files and links

Fingerprint

Cite this