TY - JOUR
T1 - 30-nm-gate InAlAs/InGaAs HEMTs lattice-matched to InP substrates
AU - Suemitsu, Tetsuya
AU - Ishii, Tetsuyoshi
AU - Yokoyama, Haruki
AU - Umeda, Yohtaro
AU - Enoki, Takatomo
AU - Ishii, Yasunobu
AU - Tamamura, Toshiaki
PY - 1998/12/1
Y1 - 1998/12/1
N2 - In this paper, we report the fabrication and the device characteristics of the InP-based lattice-matched HEMTs with a 30-mn gate, which is the smallest gate yet achieved for inP-based HEMTs. A fullerene-incorporated nanocomposite resist is used in electron beam (EB) lithography to achieve such a small gate. A cutoff frequency of the 30-nm-gate HEMTs is 350 GHz, which is comparable to the reported value for 50-nm-gate InP-based pseudomorphic HEMTs and one of the highest value achieved by any kind of three-terminal electronic device.
AB - In this paper, we report the fabrication and the device characteristics of the InP-based lattice-matched HEMTs with a 30-mn gate, which is the smallest gate yet achieved for inP-based HEMTs. A fullerene-incorporated nanocomposite resist is used in electron beam (EB) lithography to achieve such a small gate. A cutoff frequency of the 30-nm-gate HEMTs is 350 GHz, which is comparable to the reported value for 50-nm-gate InP-based pseudomorphic HEMTs and one of the highest value achieved by any kind of three-terminal electronic device.
UR - http://www.scopus.com/inward/record.url?scp=0032272325&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=0032272325&partnerID=8YFLogxK
M3 - Conference article
AN - SCOPUS:0032272325
SN - 0163-1918
SP - 223
EP - 226
JO - Technical Digest - International Electron Devices Meeting
JF - Technical Digest - International Electron Devices Meeting
T2 - Proceedings of the 1998 IEEE International Electron Devices Meeting
Y2 - 6 December 1998 through 9 December 1998
ER -