4 40-Gbit/s-class universal logic interfacer IP using GaAs HBT's for heterogeneous logic/device systems in package

Taiichi Otsuji, Seigo Takahashi, Noburo Hamasuna, Toshiaki Takada, Yutaka Matsuoka

研究成果: Conference contribution

抄録

A 40-Gbit/s-class ECL/SCFL-to-LVCMOS/LVDS universal logic interfacer IP was developed using production-level GaAs HBT's for use in a heterogeneous logic/device system in package (SiP). A unique co-design concept based on the flat and modular IP configurations was introduced to make ease of seamless/universal interconnection with reduced design/test costs. The test chip demonstrated excellent universal level-transform functions with a small power-delay product of less than 2.8 pJ.

本文言語English
ホスト出版物のタイトルIEEE Compound Semiconductor Integrated Circuit Symposium; 2004 IEEE CSIC Symposium, 26th Anniversary
ホスト出版物のサブタイトルCompounding Your Chips in Monterey - Technical Digest 2004
ページ251-254
ページ数4
DOI
出版ステータスPublished - 2004 12月 1
外部発表はい
イベントIEEE Compound Semiconductor Integrated Circuit Symposium; 2004 IEEE CSIC Symposium - Monterey, CA, United States
継続期間: 2004 10月 242004 10月 27

出版物シリーズ

名前Technical Digest - IEEE Compound Semiconductor Integrated Circuit Symposium, CSIC
ISSN(印刷版)1550-8781

Other

OtherIEEE Compound Semiconductor Integrated Circuit Symposium; 2004 IEEE CSIC Symposium
国/地域United States
CityMonterey, CA
Period04/10/2404/10/27

ASJC Scopus subject areas

  • 工学(全般)

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