A reliable bi-polarity write/erase technology in flash EEPROMs

S. Aritome, R. Shirota, R. Kirisawa, T. Endoh, R. Nakayama, K. Sakui, F. Masuoka

研究成果: ジャーナルへの寄稿会議記事査読

46 被引用数 (Scopus)

抄録

The authors describe a technology for scaling down the flash E2PROM cell, which has a conventional self-aligned double poly-Si stacked structure. It is clarified experimentally that a flash memory cell written and erased by Fowler-Nordheim (F-N) tunneling has ten times the retention time of the conventional cell, which is written by channel-hot-electron (CHE) injection and erased by F-N tunneling. This difference of data retentivity between these two write/erase (W/E) technologies is due to decreasing the thin gate oxide leakage current by bi-polarity F-N tunneling stress. This improvement in data retention becomes more pronounced as the gate oxide thickness decreases. Therefore, a bipolarity F-N tunneling W/E technology, which enables a flash E2PROM cell to scale down its oxide thickness, shows promise as a key technology for realizing 16 Mb flash E2PROMs and beyond.

本文言語英語
ページ(範囲)111-114
ページ数4
ジャーナルTechnical Digest - International Electron Devices Meeting
出版ステータス出版済み - 1990 12月
イベント1990 International Electron Devices Meeting - San Francisco, CA, USA
継続期間: 1990 12月 91990 12月 12

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