TY - GEN
T1 - An energy-efficient dynamic memory address mapping mechanism
AU - Sato, Masayuki
AU - Han, Chengguang
AU - Komatsu, Kazuhiko
AU - Egawa, Ryusuke
AU - Takizawa, Hiroyuki
AU - Kobayashi, Hiroaki
N1 - Publisher Copyright:
© 2015 IEEE.
PY - 2015/7/14
Y1 - 2015/7/14
N2 - DRAM-based main memories are energy-hungry components of modern computer systems. Since accesses to DRAM need a complex protocol, the performance of an address-mapping scheme that decides physical locations of data based on physical addresses has a big impact on energy consumption. To improve the energy efficiency, this paper proposes a mechanism that dynamically selects an appropriate address-mapping scheme under the consideration of a trade-off between performance and power consumption. The mechanism works so as to reduce the energy consumption of the main memory. The evaluation results show that the proposed mechanism can reduce the energy consumption in comparison with conventional address-mapping schemes, which do not change their address mappings.
AB - DRAM-based main memories are energy-hungry components of modern computer systems. Since accesses to DRAM need a complex protocol, the performance of an address-mapping scheme that decides physical locations of data based on physical addresses has a big impact on energy consumption. To improve the energy efficiency, this paper proposes a mechanism that dynamically selects an appropriate address-mapping scheme under the consideration of a trade-off between performance and power consumption. The mechanism works so as to reduce the energy consumption of the main memory. The evaluation results show that the proposed mechanism can reduce the energy consumption in comparison with conventional address-mapping schemes, which do not change their address mappings.
KW - DRAM
KW - address mapping
KW - energy consumption
KW - rank
UR - http://www.scopus.com/inward/record.url?scp=84943339417&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84943339417&partnerID=8YFLogxK
U2 - 10.1109/CoolChips.2015.7158660
DO - 10.1109/CoolChips.2015.7158660
M3 - Conference contribution
AN - SCOPUS:84943339417
T3 - IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XVIII - Proceedings
BT - IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XVIII - Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 18th IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips 2015
Y2 - 13 April 2015 through 15 April 2015
ER -