TY - JOUR
T1 - Design of VLSI‐oriented radix‐4 signed‐digit arithmetic circuits using multiple‐valued logic
AU - Kawahito, Shoji
AU - Kameyama, Michitaka
AU - Higuchi, Tatsuo
PY - 1987
Y1 - 1987
N2 - Radix‐4 signed‐digit (SD) arithmetic circuits using multiple‐valued logic are proposed from the viewpoint of VLSI implementation. Because of the property of sign‐symmetry in the SD number representation, a new bi‐directional current‐mode MOS technology is employed very effectively in implementing very fast and compact SD arithmetic circuits. These basic operations are simulated and evaluated using SPICE2. Finally, it is demonstrated that these arithmetic circuits can be fabricated using 2 um CMOS technology. For example, a multiply time of 40 ns can be achieved in the SD multiplier with a 17 × 16 bit precision.
AB - Radix‐4 signed‐digit (SD) arithmetic circuits using multiple‐valued logic are proposed from the viewpoint of VLSI implementation. Because of the property of sign‐symmetry in the SD number representation, a new bi‐directional current‐mode MOS technology is employed very effectively in implementing very fast and compact SD arithmetic circuits. These basic operations are simulated and evaluated using SPICE2. Finally, it is demonstrated that these arithmetic circuits can be fabricated using 2 um CMOS technology. For example, a multiply time of 40 ns can be achieved in the SD multiplier with a 17 × 16 bit precision.
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U2 - 10.1002/scj.4690180405
DO - 10.1002/scj.4690180405
M3 - Article
AN - SCOPUS:0023330654
SN - 0882-1666
VL - 18
SP - 41
EP - 52
JO - Systems and Computers in Japan
JF - Systems and Computers in Japan
IS - 4
ER -