Design of VLSI‐oriented radix‐4 signed‐digit arithmetic circuits using multiple‐valued logic

Shoji Kawahito, Michitaka Kameyama, Tatsuo Higuchi

研究成果: Article査読

抄録

Radix‐4 signed‐digit (SD) arithmetic circuits using multiple‐valued logic are proposed from the viewpoint of VLSI implementation. Because of the property of sign‐symmetry in the SD number representation, a new bi‐directional current‐mode MOS technology is employed very effectively in implementing very fast and compact SD arithmetic circuits. These basic operations are simulated and evaluated using SPICE2. Finally, it is demonstrated that these arithmetic circuits can be fabricated using 2 um CMOS technology. For example, a multiply time of 40 ns can be achieved in the SD multiplier with a 17 × 16 bit precision.

本文言語English
ページ(範囲)41-52
ページ数12
ジャーナルSystems and Computers in Japan
18
4
DOI
出版ステータスPublished - 1987

ASJC Scopus subject areas

  • 理論的コンピュータサイエンス
  • 情報システム
  • ハードウェアとアーキテクチャ
  • 計算理論と計算数学

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