TY - GEN
T1 - Self-assembly-based 3D integration technologies
AU - Fukushima, T.
AU - Bea, J.
AU - Murugesan, M.
AU - Lee, K. W.
AU - Tanaka, T.
AU - Koyanagi, M.
PY - 2012/8/15
Y1 - 2012/8/15
N2 - We have proposed and developed massively parallel chip self-assembly technologies using surface tension of liquid for advanced chip-to-wafer 3D integration. Here, we introduce flip-chip self-assembly in batch processing and reconfigured wafer-to-wafer 3D integration as a new chip-to-wafer 3D integration approach using self-assembly.
AB - We have proposed and developed massively parallel chip self-assembly technologies using surface tension of liquid for advanced chip-to-wafer 3D integration. Here, we introduce flip-chip self-assembly in batch processing and reconfigured wafer-to-wafer 3D integration as a new chip-to-wafer 3D integration approach using self-assembly.
UR - http://www.scopus.com/inward/record.url?scp=84864844157&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84864844157&partnerID=8YFLogxK
U2 - 10.1109/LTB-3D.2012.6238075
DO - 10.1109/LTB-3D.2012.6238075
M3 - Conference contribution
AN - SCOPUS:84864844157
SN - 9781467307420
T3 - Proceedings of 2012 3rd IEEE International Workshop on Low Temperature Bonding for 3D Integration, LTB-3D 2012
BT - Proceedings of 2012 3rd IEEE International Workshop on Low Temperature Bonding for 3D Integration, LTB-3D 2012
T2 - 2012 3rd IEEE International Workshop on Low Temperature Bonding for 3D Integration, LTB-3D 2012
Y2 - 22 May 2012 through 23 May 2012
ER -